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5e04b0d
[sync] [Kernel] Implement CUDA kernel for ReLUSquaredActivation (relu…
AlpinDale Jul 15, 2026
db67fde
[sync] [ROCm][MiniMax-M3] Add AITER sparse paged attention (#47287)
AlpinDale Jul 15, 2026
addb675
[sync] [Model] Optimize Qwen3.5 on H20 (#48350)
AlpinDale Jul 15, 2026
6d5d3e8
[sync] [Bugfix][ROCm] Keep TP all_gather on base-class collective (#4…
AlpinDale Jul 15, 2026
f3f79a7
[sync] Re-disable CUDA graph memory profiling on ROCm (#48440)
AlpinDale Jul 15, 2026
bd9b8f6
[sync] [CPU][Spec Decode] Support DFlash speculative decoding for GDN…
AlpinDale Jul 15, 2026
afbcf57
[sync] [Bugfix][UT]Fix EagleMiniCPMForCausalLM meet TypeError (#48452)
AlpinDale Jul 15, 2026
95a7794
[sync] [CPU] Create Proper Numa topology for s390x (#40714)
AlpinDale Jul 15, 2026
0bcc81e
[sync] [BugFix] Restore full tokens for Qwen MTP When MoE SP (#48429)
AlpinDale Jul 15, 2026
9df22cd
[sync] [ROCm][CI] Cache Rust builds by source inputs (#46527)
AlpinDale Jul 15, 2026
7ba697c
[sync] [Distributed][Perf] Enable FlashInfer MNNVL allreduce RMS quan…
AlpinDale Jul 15, 2026
216d556
[sync] [Attention] Make sliding-window support an explicit backend ca…
AlpinDale Jul 15, 2026
dec1704
[sync] [Bugfix][KV Cache] Don't route uniform-page-size MLA+SWA model…
AlpinDale Jul 15, 2026
6ecad55
[sync] [Core] Support fp32 lm_head for generation models via head_dty…
AlpinDale Jul 15, 2026
40ce70a
[sync] [CI] Add SPDX license header to Rust/Protobuf sources (#48472)
AlpinDale Jul 15, 2026
f00c5d3
[sync] [Mypy Fix] Split mypy work (#48490)
AlpinDale Jul 15, 2026
044d329
[sync] lower memory required for capturing cudagraphs for large cudag…
AlpinDale Jul 15, 2026
094bff1
[sync] remove force channels_last in Idefics3MultiModalProcessor (#48…
AlpinDale Jul 15, 2026
59c44dd
[sync] [BugFix][ModelRunner V2] Fix stale attn metadata in speculator…
AlpinDale Jul 15, 2026
e9686e5
[sync] [Misc] Improve Matryoshka pooling dimensions validation (#48057)
AlpinDale Jul 15, 2026
638b77d
[sync] [EC Connector] CPU Offloading EC Connector (#47423)
AlpinDale Jul 15, 2026
a5b9df5
[sync] [ROCm][CI] Transformers: pass only one of input_ids/inputs_emb…
AlpinDale Jul 15, 2026
876e05a
[sync] [Doc] Add DeepseekV32ForCausalLM to supported_models.md (#48293)
AlpinDale Jul 15, 2026
0c4beb6
[sync] [Bugfix][Frontend] Flush engine reasoning parser at engine-rea…
AlpinDale Jul 15, 2026
3e24421
[sync] [ROCm][CI] Unblock `AMD: Language Models Test (Extended Poolin…
AlpinDale Jul 15, 2026
bed9d09
[sync] Add DCP + Eagle support for Tokenspeed MLA backends (#48180)
AlpinDale Jul 15, 2026
9c8a0e2
[sync] Added sliding window attention support for qwen-eagle3 archite…
AlpinDale Jul 15, 2026
3b354c6
[sync] [Core] Preserve Marconi caching with selective hybrid cache re…
AlpinDale Jul 15, 2026
c5d1b46
[sync] [BugFix] Initialize model_config for Qwen3-VL MoE (#44863)
AlpinDale Jul 15, 2026
b49e024
[sync] [Feat] Add Support for BertForMaskedLM to vLLM (#48463)
AlpinDale Jul 15, 2026
cc633a6
[sync] [Frontend] Expose logprob_token_ids on Python OpenAI endpoints…
AlpinDale Jul 15, 2026
a966a3a
[sync] [BugFix] Correct OTEL span start time for Dynamo compilation (…
AlpinDale Jul 15, 2026
9a49f25
[sync] add pad-aware swiglu limit kernel (#48287)
AlpinDale Jul 15, 2026
402f3c5
[sync] [Quantization][INC][ARK] Support INT2 XPU WOQ Linear (#47521)
AlpinDale Jul 15, 2026
fe83c22
[sync] [1/N] Add dense MHA path for sparse MLA short sequences (#47327)
AlpinDale Jul 15, 2026
b181cad
[sync] up FI fp8 moe topk to 32 (#44462)
AlpinDale Jul 15, 2026
a4cd48a
[sync] [ROCm][MiniMax-M2] Dispatch fused QK-norm + AllReduce via AITE…
AlpinDale Jul 15, 2026
1cce96c
[sync] [ROCm][Kernel] Add HybridW4A16LinearKernel: Triton prefill + H…
AlpinDale Jul 15, 2026
c1131a9
[sync] [Perf][ROCm] Fix GDN KKT warmup regression on RDNA by avoiding…
AlpinDale Jul 15, 2026
0f845fe
[sync] [ROCm][MiniMax-M3][Spec Decode] Support speculative decode wit…
AlpinDale Jul 15, 2026
8385d24
[sync] [Bugfix] Skip minimax_m3 tool parser tests when Rust extension…
AlpinDale Jul 15, 2026
23c79b7
[sync] [Misc] Clean up "swap_space" (#48549)
AlpinDale Jul 15, 2026
f381e5e
[sync] [ROCm] Retune MI355 selective_state_update float16 config on t…
AlpinDale Jul 15, 2026
c977caf
[sync] [Perf][Feat] Add generic cuteDSL LL BF16 router (GEMM) (#42562)
AlpinDale Jul 15, 2026
e9320f1
[sync] fix(security): guard lm-format-enforcer regex compile with tim…
AlpinDale Jul 15, 2026
663833c
[sync] Add Cosmos3 Edge Reasoner model (#48291)
AlpinDale Jul 15, 2026
df45cac
[sync] [Bugfix] Return 400 instead of 500 when multimodal data is sen…
AlpinDale Jul 15, 2026
28944f8
[sync] [Test] Enable KV cache events for HMA models in CPU offloading…
AlpinDale Jul 15, 2026
b7871b8
[sync] [Misc] Rename VLLM_TRITON_ATTN_USE_TD to VLLM_TRITON_USE_TD (#…
AlpinDale Jul 15, 2026
d49c8ca
[sync] [Bugfix][Security] Fix concurrent sparse invariant race bypass…
AlpinDale Jul 15, 2026
aab90ef
[sync] [Model] Enable LoRA support for tower and connector in LlavaNe…
AlpinDale Jul 15, 2026
36d3005
[sync] [NIXL] Avoid reading expired blocks in bidirectional turn-2 re…
AlpinDale Jul 15, 2026
946bed4
[sync] [Bugfix] Include inline per-token-head scales in offloaded pag…
AlpinDale Jul 15, 2026
fd03a9c
[sync] [Bugfix] Gemma4 parser: classify channel-less output consisten…
AlpinDale Jul 15, 2026
b78eab8
[sync] [CI Bug] Fully solve accuracy issue for DSv3.2 + MTP + Sequenc…
AlpinDale Jul 15, 2026
8d6be74
[sync] [Bugfix] Make MLA+SWA check the layer's backend, not the model…
AlpinDale Jul 15, 2026
ffe607b
[sync] [Doc] Sync four function docstrings with their signatures (#45…
AlpinDale Jul 15, 2026
4744ecc
[sync] [KV Offload] Split cpu_cache_usage_perc into write/read usage …
AlpinDale Jul 15, 2026
afcd63c
[sync] [ROCm] Retune MI355 selective_state_update float32 config on t…
AlpinDale Jul 15, 2026
7d53e82
[sync] [Reasoning] Optimize TPOT for thinking budget when used with s…
AlpinDale Jul 15, 2026
0e7a9c3
[sync] [CI] Build macOS arm64 CPU wheel natively on the macmini queue…
AlpinDale Jul 15, 2026
8f6ef8d
[sync] [ROCm][CI] fix flashinfer import check (#48647)
AlpinDale Jul 15, 2026
cb452be
[sync] [CI][Bugfix] Fix FlashAttention reported MLA dimension support…
AlpinDale Jul 15, 2026
7a913a4
[sync] Log fully resolved pooling config at startup (#48030)
AlpinDale Jul 15, 2026
236dc82
[sync] [Bugfix][CI] Fix test_head_dtype quant_method test on ROCm (#4…
AlpinDale Jul 15, 2026
49dd6ae
[sync] fix: size FlashInfer prefill workspace to batch head footprint…
AlpinDale Jul 15, 2026
0eb5b42
[sync] [Bugfix][R3] Exclude draft routers from expert capture (#48622)
AlpinDale Jul 15, 2026
d482229
[sync] [Bugfix] Preserve unloaded non-persistent buffers during layer…
AlpinDale Jul 15, 2026
6cbb3a9
[sync] [Perf] Remove redundant repeat and copy for dsv4, 1.8% E2E TPO…
AlpinDale Jul 15, 2026
19fff71
[sync] add pad-aware reduce path (#48385)
AlpinDale Jul 15, 2026
c022b75
[sync] [ROCm][CI] Remove mxfp4 test skips after `amd-quark` 0.12 rele…
AlpinDale Jul 15, 2026
15305f1
[sync] [Core][LoRA] Support fp32 lm_head (head_dtype) on the LoRA pat…
AlpinDale Jul 15, 2026
2125152
[sync] [Quant] Enable humming w[2-7]a[4,8] inference with compressed-…
AlpinDale Jul 15, 2026
13de1f6
[sync] [LoRA][1/N] Integrate flashinfer MoE LoRA for BF16 model (#48632)
AlpinDale Jul 15, 2026
c58b168
[sync] [Security] Replace diskcache to eliminate pickle deserializati…
AlpinDale Jul 15, 2026
19bf72e
[sync] Build with ABI stable FlashMLA (#48174)
AlpinDale Jul 15, 2026
8e91d3b
[sync] [Bugfix] Set kv_quant_mode on the generic MLA KV-cache spec (#…
AlpinDale Jul 15, 2026
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2 changes: 1 addition & 1 deletion .pre-commit-config.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -110,7 +110,7 @@ repos:
name: Check SPDX headers
entry: python tools/pre_commit/check_spdx_header.py
language: python
types: [python]
types_or: [python, rust, proto]
exclude: ^(reference/|aphrodite/vllm_flash_attn/|aphrodite/third_party/|tests/|examples/|benchmarks/)
- id: check-root-lazy-imports
name: Check root lazy imports
Expand Down
2 changes: 1 addition & 1 deletion .sync/vllm-sha
Original file line number Diff line number Diff line change
@@ -1 +1 @@
4c81772e8bdf9e37ab2b8adfd80e4308b618fa92
6472131298e7b9ce81651cac90cc2dcc28963b55
1 change: 1 addition & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -1479,6 +1479,7 @@ if(APHRODITE_GPU_LANG STREQUAL "HIP")
set(APHRODITE_ROCM_EXT_SRC
"csrc/rocm/torch_bindings.cpp"
"csrc/rocm/skinny_gemms.cu"
"csrc/rocm/skinny_gemms_int4.cu"
"csrc/rocm/attention.cu")

set(APHRODITE_ROCM_HAS_GFX1100 OFF)
Expand Down
4 changes: 2 additions & 2 deletions aphrodite/_aiter_ops.py
Original file line number Diff line number Diff line change
Expand Up @@ -2587,7 +2587,8 @@ def shuffle_weight_a16w4(

Args:
tensor: The input weight tensor to be shuffled.
layout: The block layout to use, defaults to (16, 4).
nLane: Number of lanes in the shuffle layout.
gate_up: Whether the weight is for w13 (True) or w2 (False).

Returns:
torch.Tensor: The shuffled tensor.
Expand Down Expand Up @@ -2823,7 +2824,6 @@ def mhc_pre(
hc_sinkhorn_eps: sinkhorn epsilon
hc_post_mult_value: post-mix multiplier value
sinkhorn_repeat: number of sinkhorn iterations
n_splits: split-k factor;

Returns:
post_mix: shape (..., hc_mult), dtype torch.float32
Expand Down
85 changes: 82 additions & 3 deletions aphrodite/_custom_ops.py
Original file line number Diff line number Diff line change
Expand Up @@ -1960,7 +1960,11 @@ def scaled_fp4_quant(
Args:
input: The input tensor to be quantized to FP4
input_global_scale: A scalar scaling factor for the entire tensor.
use_8x4_sf_layout: Whether to use the 8x4 or 128x4 layout for the scaling
is_sf_swizzled_layout: Whether to store the scaling factors in the
swizzled layout (default `True`).
backend: Quantization kernel backend to dispatch to. For `"trtllm"`
backends the 8x4 scale-factor layout is selected for small
batches (m <= 32) instead of the 128x4 layout.
padded_n: Optional padded K dimension. When provided, the quantized
output and scale tensors are allocated for ``padded_n``

Expand Down Expand Up @@ -2592,6 +2596,35 @@ def wvSplitK(a: torch.Tensor, b: torch.Tensor, cu_count: int, bias: torch.Tensor
return torch.ops._rocm_C.wvSplitK(a, b, bias, cu_count)


def wvSplitK_int4_g(
weight: torch.Tensor,
activation: torch.Tensor,
scale: torch.Tensor,
cu_count: int,
group_size: int,
zero_points: torch.Tensor | None = None,
bias: torch.Tensor | None = None,
) -> torch.Tensor:
# The kernel is weight-major: weight is the packed int4 operand
# (in_a, [out_features, K/2]) and activation is in_b ([num_tokens, K]).
return torch.ops._rocm_C.wvSplitK_int4_g(weight, activation, scale, zero_points, bias, cu_count, group_size)


if hasattr(torch.ops, "_rocm_C") and hasattr(torch.ops._rocm_C, "wvSplitK_int4_g"):

@register_fake("_rocm_C::wvSplitK_int4_g")
def _wvSplitK_int4_g_fake(
in_a: torch.Tensor,
in_b: torch.Tensor,
in_scale: torch.Tensor,
in_zero_points: torch.Tensor | None,
in_bias: torch.Tensor | None,
CuCount: int,
group_size: int,
) -> torch.Tensor:
return torch.empty((in_b.size(0), in_a.size(0)), dtype=in_b.dtype, device=in_b.device)


def wvSplitKrc(a: torch.Tensor, b: torch.Tensor, cu_count: int, bias: torch.Tensor = None) -> torch.Tensor:
return torch.ops._rocm_C.wvSplitKrc(a, b, bias, cu_count)

Expand All @@ -2611,8 +2644,13 @@ def wvSplitKQ(


# moe
def moe_sum(input: torch.Tensor, output: torch.Tensor):
torch.ops._moe_C.moe_sum(input, output)
def moe_sum(
input: torch.Tensor,
output: torch.Tensor,
topk_ids: torch.Tensor | None = None,
expert_map: torch.Tensor | None = None,
):
torch.ops._moe_C.moe_sum(input, output, topk_ids, expert_map)


def moe_align_block_size(
Expand Down Expand Up @@ -3023,6 +3061,7 @@ def fused_minimax_m3_qknorm_rope_kv_insert(
q_out: torch.Tensor | None = None,
index_q_out: torch.Tensor | None = None,
kv_cache_dtype: str = "auto",
skip_index_branch: bool = False,
) -> None:
"""Fused MiniMax-M3 attention pre-processing (in-place).

Expand All @@ -3044,6 +3083,11 @@ def fused_minimax_m3_qknorm_rope_kv_insert(
instead of in place — folding the de-interleave into this kernel's store so
callers skip a separate ``.contiguous()`` copy before the SM100 sparse
attention's flat TMA descriptor.

When ``skip_index_branch`` is true, sparse rows still keep their packed
``[index_q | index_k]`` tail, but the kernel only processes the main q/k/v
branches and main KV cache. This is used by MiniMax-M3 index-topk reuse
layers that consume top-k block ids selected by an earlier sparse layer.
"""
torch.ops._C.fused_minimax_m3_qknorm_rope_kv_insert(
qkv,
Expand All @@ -3066,6 +3110,7 @@ def fused_minimax_m3_qknorm_rope_kv_insert(
q_out,
index_q_out,
kv_cache_dtype,
skip_index_branch,
)


Expand Down Expand Up @@ -3803,6 +3848,40 @@ def fused_sigmoid_gating_delta_rule_update_cpu(
)


def fused_sigmoid_gating_delta_rule_update_spec_cpu(
A_log: torch.Tensor,
dt_bias: torch.Tensor,
q: torch.Tensor,
k: torch.Tensor,
v: torch.Tensor,
a: torch.Tensor,
b: torch.Tensor,
initial_state_source: torch.Tensor,
spec_state_indices: torch.Tensor,
num_accepted_tokens: torch.Tensor,
cu_seqlens: torch.Tensor,
use_qk_l2norm_in_kernel: bool,
softplus_beta: float = 1.0,
softplus_threshold: float = 20.0,
) -> torch.Tensor:
return torch.ops._C.fused_sigmoid_gating_delta_rule_update_spec_cpu(
A_log,
dt_bias,
q,
k,
v,
a,
b,
initial_state_source,
spec_state_indices,
num_accepted_tokens,
cu_seqlens,
use_qk_l2norm_in_kernel,
softplus_beta,
softplus_threshold,
)


def fused_gdn_gating_cpu(
A_log: torch.Tensor,
a: torch.Tensor,
Expand Down
9 changes: 6 additions & 3 deletions aphrodite/compilation/backends.py
Original file line number Diff line number Diff line change
Expand Up @@ -1143,16 +1143,19 @@ def __call__(self, graph: fx.GraphModule, example_inputs: Sequence[Any]) -> Any:
compilation_counter.num_graphs_seen += 1
from .monitor import torch_compile_start_time

dynamo_time = time.perf_counter() - torch_compile_start_time
current_perf = time.perf_counter()
current_epoch = time.time()
dynamo_time = current_perf - torch_compile_start_time
logger.info_once(
"Dynamo bytecode transform time: %.2f s",
dynamo_time,
)

# Record Dynamo time in tracing if available
start_time = int(torch_compile_start_time * 1e9)
real_start_time = current_epoch - dynamo_time
start_time_ns = int(real_start_time * 1e9)
attributes = {"dynamo.time_seconds": dynamo_time}
instrument_manual("Dynamo bytecode transform", start_time, None, attributes)
instrument_manual("Dynamo bytecode transform", start_time_ns, None, attributes)

# we control the compilation process, each instance can only be
# called once
Expand Down
42 changes: 33 additions & 9 deletions aphrodite/compilation/passes/fusion/allreduce_rms_fusion.py
Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,20 @@
_IR_FUSED_ADD_RMS_NORM_OP = torch.ops.aphrodite_ir.fused_add_rms_norm.default


def _view_nvfp4_scale_out_for_flashinfer(
scale_out: torch.Tensor,
) -> torch.Tensor:
"""View Aphrodite's packed NVFP4 scale buffer as FP8 for FlashInfer."""
return torch.ops.aten.view.dtype(scale_out, FP8_DTYPE)


def _view_flashinfer_nvfp4_scale_out_as_int32(
scale_out: torch.Tensor,
) -> torch.Tensor:
"""View FlashInfer's NVFP4 scale buffer back as Aphrodite's int32 format."""
return torch.ops.aten.view.dtype(scale_out, torch.int32)


def _norm_input_weight_dtype_match(match: pm.Match) -> bool:
"""Prevent fusion when the norm input and weight dtypes differ (e.g. a Gemma
fp32 weight.float()+1 gamma), covering rms_norm and fused_add_rms_norm."""
Expand Down Expand Up @@ -194,8 +208,8 @@ def call_trtllm_fused_allreduce_norm(
curr_device = current_platform.get_device_capability()
device_capability = curr_device.to_int() if curr_device is not None else None

# Select workspace based on pattern: quant patterns use the
# trtllm quant workspace, non-quant patterns use the primary workspace.
# Select workspace based on pattern: quant patterns use the quant
# workspace, non-quant patterns use the primary workspace.
is_quant_pattern = pattern_code in (
ar_fusion_patterns.kARResidualRMSNormFP8Quant,
ar_fusion_patterns.kARResidualRMSNormFP4Quant,
Expand Down Expand Up @@ -227,9 +241,9 @@ def call_trtllm_fused_allreduce_norm(
residual_out = allreduce_in

layout_code = None
# layout_code only supported by trtllm backend
if workspace.backend == "trtllm":
# in aphrodite we only support swizzled layout
# Aphrodite quant patterns use swizzled scale-factor layout. Non-quant
# patterns ignore layout_code.
if workspace.backend in ("trtllm", "mnnvl"):
layout_code = flashinfer_comm.QuantizationSFLayout.SWIZZLED_128x4

flashinfer_comm.allreduce_fusion(
Expand Down Expand Up @@ -798,14 +812,15 @@ def replacement(
) -> tuple[torch.Tensor, torch.Tensor, torch.Tensor]:
residual = torch.zeros_like(input)
result_rms = torch.empty_like(input)
output_scale_fp8 = _view_nvfp4_scale_out_for_flashinfer(output_scale)
assert flashinfer_comm is not None, "FlashInfer must be enabled"
allreduce = auto_functionalized(
flashinfer_trtllm_fused_allreduce_norm,
allreduce_in=input,
residual=residual,
norm_out=result_rms,
quant_out=quant_result,
scale_out=output_scale,
scale_out=output_scale_fp8,
rms_gamma=weight,
rms_eps=self.epsilon,
# We don't use norm_out afterwards
Expand All @@ -815,7 +830,11 @@ def replacement(
)

# quant_out, allreduce_output, output_scale
return allreduce[4], allreduce[1], allreduce[5]
return (
allreduce[4],
allreduce[1],
_view_flashinfer_nvfp4_scale_out_as_int32(allreduce[5]),
)

pm.register_replacement(
pattern,
Expand Down Expand Up @@ -895,14 +914,15 @@ def replacement(
weight: torch.Tensor,
input_global_scale: torch.Tensor,
) -> tuple[torch.Tensor, torch.Tensor, torch.Tensor]:
output_scale_fp8 = _view_nvfp4_scale_out_for_flashinfer(output_scale)
assert flashinfer_comm is not None, "FlashInfer must be enabled"
allreduce = auto_functionalized(
flashinfer_trtllm_fused_allreduce_norm,
allreduce_in=input,
residual=residual,
norm_out=None,
quant_out=quant_result,
scale_out=output_scale,
scale_out=output_scale_fp8,
rms_gamma=weight,
rms_eps=self.epsilon,
# We don't use norm_out afterwards
Expand All @@ -911,7 +931,11 @@ def replacement(
**self.allreduce_params.get_trtllm_fused_allreduce_kwargs(),
)
# quant_out, rms_norm_residual, output_scale
return allreduce[4], allreduce[2], allreduce[5]
return (
allreduce[4],
allreduce[2],
_view_flashinfer_nvfp4_scale_out_as_int32(allreduce[5]),
)

pm.register_replacement(
pattern,
Expand Down
5 changes: 5 additions & 0 deletions aphrodite/config/attention.py
Original file line number Diff line number Diff line change
Expand Up @@ -59,6 +59,11 @@ class AttentionConfig:
use_non_causal: bool = False
"""Whether to use non-causal (bidirectional) attention."""

sparse_mla_force_mqa: bool = False
"""Force sparse MLA to use forward_mqa for all requests, including prefill.
When False (default), pure prefill batches use forward_mha when implemented.
Set to True to always use the MQA path."""

flex_attn_block_m: int | None = None
"""Triton kernel BLOCK_M tile size for flex attention.
Must be a power of 2 >= 16. If None and APHRODITE_BATCH_INVARIANT=1,
Expand Down
27 changes: 16 additions & 11 deletions aphrodite/config/model.py
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@
MMTensorIPC,
MultiModalConfig,
)
from aphrodite.config.pooler import PoolerConfig
from aphrodite.config.pooler import POOLER_CONFIG_LOG_FIELDS, PoolerConfig
from aphrodite.config.quantization import QuantizationConfigArgs
from aphrodite.config.scheduler import RunnerType
from aphrodite.config.utils import config, getattr_iter
Expand Down Expand Up @@ -623,20 +623,30 @@ def __post_init__(
if self.runner_type == "pooling":
if self.pooler_config is None:
self.pooler_config = PoolerConfig()
pooler_config_sources: dict[str, str] = {}
else:
pooler_config_sources = {
k: "user" for k in POOLER_CONFIG_LOG_FIELDS if getattr(self.pooler_config, k) is not None
}

base_config = get_pooling_config(self.model, self.revision)
if base_config is not None:
# Only set values that are not overridden by the user
for k, v in base_config.items():
if getattr(self.pooler_config, k) is None:
setattr(self.pooler_config, k, v)
pooler_config_sources[k] = "sentence_transformers"

default_seq_pooling_type = self._model_info.default_seq_pooling_type
if self.pooler_config.seq_pooling_type is None:
self.pooler_config.seq_pooling_type = default_seq_pooling_type
pooler_config_sources["seq_pooling_type"] = "model_default"
default_tok_pooling_type = self._model_info.default_tok_pooling_type
if self.pooler_config.tok_pooling_type is None:
self.pooler_config.tok_pooling_type = default_tok_pooling_type
pooler_config_sources["tok_pooling_type"] = "model_default"
pooler_config_sources.setdefault("use_activation", "pooler_default")
self._pooler_config_sources = pooler_config_sources

self.dtype: torch.dtype = _get_and_verify_dtype(
self.model,
Expand Down Expand Up @@ -1611,21 +1621,16 @@ def head_dtype(self) -> torch.dtype:
such as the lm_head in a generation model,
or the score or classifier in a classification model.

`head_dtype` currently only supports pooling models.

- The pooling model defaults to using fp32 head, you can use
- Pooling models default to an fp32 head; use
--hf-overrides '{"head_dtype": "model"}' to disable it.
- Generation models default to the model dtype; set
--hf-overrides '{"head_dtype": "float32"}' to run the lm_head in
fp32, which is required for RL training-inference consistency
(the trainer computes logits in fp32).
"""

head_dtype = _get_head_dtype(config=self.hf_config, dtype=self.dtype, runner_type=self.runner_type)

if self.runner_type != "pooling" and head_dtype != self.dtype:
logger.warning_once(
"`head_dtype` currently only supports pooling models, fallback to model dtype [%s].",
self.dtype,
)
return self.dtype

if head_dtype not in current_platform.supported_dtypes:
logger.warning_once(
"The current platform does not support [%s] head dtype, fallback to model dtype [%s].",
Expand Down
1 change: 0 additions & 1 deletion aphrodite/config/parallel.py
Original file line number Diff line number Diff line change
Expand Up @@ -628,7 +628,6 @@ def use_sequence_parallel_moe(self) -> bool:
)
and self.enable_expert_parallel
and self.tensor_parallel_size > 1
and self.data_parallel_size > 1
)

@property
Expand Down
6 changes: 6 additions & 0 deletions aphrodite/config/pooler.py
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,12 @@
TokenPoolingType = Literal["ALL", "STEP"]
TOK_POOLING_TYPES: tuple[TokenPoolingType, ...] = get_args(TokenPoolingType)

POOLER_CONFIG_LOG_FIELDS = (
"seq_pooling_type",
"tok_pooling_type",
"use_activation",
)


@config
class PoolerConfig:
Expand Down
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