feat: SafeRegAlloc IRToX64 integration, wiring, and IRLower routing fixes

[egecanakincioglu]

SafeRegAlloc full integration into the compiler backend

IRToX64.arm (+504 lines)

Component	Description
safeLoadVal	Load IR value from stack slot into scratch register
safeStoreDst	Store result from scratch register to stack slot
safeLoadArg	Load value directly into specific register (CALL/SYSCALL args)
safeBeginInstr/safeEndInstr	Instruction boundary cleanup + assertions
emitFunctionSafe	Stack-canonical prologue/epilogue with param save
emitInstrSafe	20/35 opcodes: MOV, BINOP, CALL, SYSCALL, LOAD, STORE, control flow
Stack args	CALL >6 args on Linux, >4 on Windows (sub RSP + mov + add RSP cleanup)
Callee param save	Stack params at [RBP+16+] saved to slots in safe prologue

NativeBackend.arm (+45 lines)

• useSafeRegAlloc flag + setSafeRegAlloc(enabled) setter
• SafeRegAlloc instance created and wired in compile()
• Error gate fix: hasError check after elf.build()/pe.build() (applyFixups)
• Prevents binary output when unresolved labels exist

Main.arm (+24 lines)

• --safe-regalloc CLI flag: activates SafeRegAlloc mode
• Flag passed through compile() → NativeBackend.setSafeRegAlloc(true)

IRLower.arm (+195 lines)

Fix	Description
toLower	__arimo_tolower helper: strlen + mmap + ASCII lowercase loop
super() routing	Resolve parent class from curClass/classParents, emit ParentClass__init
system()	__arimo_system helper: fork+execve+waitpid via syscalls
List.compareTo	Inline pointer comparison (CMP+JE, returns 0 or -1)

Verification

• Single-file regression 9/9 PASS with --safe-regalloc
• S1→S2 build PASS
• Stack args smoke: 7 args → 28, 8 args → 36
• 0 unsupported opcodes, 0 assertion failures
• CALL stack args errors: eliminated (7→0)