Skip to content

[Accton][wedge800bact] Restore SCM_CPLD default write protect and OOB control #1195

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
brandonchuang wants to merge 1 commit into
base: main
Choose a base branch
from
Open

[Accton][wedge800bact] Restore SCM_CPLD default write protect and OOB control #1195

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
15 changes: 1 addition & 14 deletions fboss/platform/configs/wedge800bact/platform_manager.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -712,20 +712,7 @@
"busName": "INCOMING@2",
"address": "0x35",
"kernelDeviceName": "w800_scmcpld",
"pmUnitScopedName": "SCM_CPLD",
"initRegSettings": [
{
"__comment__": [
"CPLD_OOB_EEPROM_SEL0: Set this bit to 1 to select IOB_FPGA as the master for accessing the EEPROM.",
"When CPLD_OOB_EEPROM_SEL0 is 1, the EEPROM is read by the IOB_FPGA, allowing the FPGA to initialize or configure",
"system parameters directly. When CPLD_OOB_EEPROM_SEL0 is 0, the OOB 88E6321 switch would access the EEPROM instead."
],
"regOffset": 177,
"ioBuf": [
2
]
}
]
"pmUnitScopedName": "SCM_CPLD"
},
{
"busName": "SCM_MUX_A@0",
Expand Down
Loading