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v0.1-fpga-done — First successful FPGA programming

05 May 15:05
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v0.1-fpga-done
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v0.1-fpga-done — First successful FPGA programming Latest
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FPGA DONE=1 (2026-05-05)

First successful bitstream programming of QMTech XC7A200T-FGG676 via ESP32 XVC WiFi JTAG bridge.

Bitstream

  • File: design.bit
  • SHA-256: 8536e265b6b2119c528cc521133b484c2d27a1c0a97346095920ca9a2d77352b
  • Resources: 83 LUT, 27 FF, 25 IO
  • Max frequency: 309 MHz

STAT Register: 0x401079FC

  • CRC Error: No
  • DONE: 1
  • INIT Complete: 1
  • EOS: 1
  • GWE: 1
  • GHIGH_B: 1
  • MMCM Lock: 1
  • DCI Match: 1

Hardware

  • FPGA: XC7A200T (labeled XC7A100T), IDCODE 0x13631093
  • JTAG: ESP32-D0WD-V3 XVC server, WiFi 192.168.1.30:2542
  • Programmer: openFPGALoader --cable xvc-client

Usage

openFPGALoader --cable xvc-client --ip 192.168.1.30 --port 2542 design.bit

φ² + φ⁻² = 3 | TRINITY

Assets 3
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