feat(cv32e40p): add standalone platform and core config#74
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Add the CV32E40P standalone platform to gvsoc-pulp: - cv32e40p-standalone.py target file - cv32e40p_exit_device.py Python wrapper - CV32E40P core config in pulp_cores.py (CSR semantics, FPU, ZFINX, num_hpm).
Companion change to the gvsoc-core removal: cv32e40p_exit is a target-specific device, so it lives in gvsoc-pulp. - New pulp/cv32e40p_exit/CMakeLists.txt registers the vp_model pulp.cv32e40p_exit.cv32e40p_exit_device. - pulp/CMakeLists.txt: add_subdirectory(cv32e40p_exit). - cv32e40p_exit_device.py: set_component() updated to the new component path.
Follow-up to the ISS source relocation: update add_sources() to the new src/cv32e40p/ paths. Behaviour-preserving.
Consistent Marco Paci / Fondazione Chips-it (https://chips-it.it) attribution across the CV32E40P-specific files: standalone platform, core config, exit device, pulp_cores patches.
mhartid is a CsrReg now and doesn't convert to int implicitly. Read the underlying value explicitly, like the other in-ISS consumers (e.g. lsu.cpp).
Cosmetic cleanup of inline comments in pulp_cores.py — remove internal prefix markers, keep the technical content.
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Branch refreshed — ready for review @haugougThe branch has been refactored and force-pushed. Head is now Commit history (linear, cleaned)Notes on
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Summary
Add CV32E40P standalone platform definition and core configuration for GVSOC simulation.
What's included
cv32e40p-standalone.py: Standalone platform with correct memory map (RAM 4MB @ 0x0, STDOUT @ 0x10000000, EXIT @ 0x20000000), configurable FPU/PULP/ZFINX parameterscv32e40p_exit_device.py: Python model for memory-mapped exit devicepulp/cpu/iss/pulp_cores.py: CV32E40P core model with full CSR config (write masks, reset values, volatile flags for mcountinhibit, mstatus, tdata1, dcsr, etc.) andnum_mhpmcountersparametrizationValidation
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