Upgrade halide-llvm to 23.0.0.dev100667+g9bf20bdf#9178
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Codecov Report❌ Patch coverage is
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## main #9178 +/- ##
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Coverage ? 69.75%
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Files ? 255
Lines ? 78572
Branches ? 18788
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Hits ? 54806
Misses ? 18185
Partials ? 5581 ☔ View full report in Codecov by Harness. 🚀 New features to boost your workflow:
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There is some remaining build issue on Windows. Will reproduce locally. |
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Windows failures were caused by However, LLVM introduced an arm-32 regression here: llvm/llvm-project#209244 |
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correctness_interleave_rgb with target=host-hvx hit an LLVM assertion (EVT::getSimpleVT: Expected a SimpleValueType) inside HexagonTargetLowering::PerformHvxDAGCombine. CodeGen_Hexagon::interleave_vectors routed 3-way interleaves of small boolean/predicate vectors (from TailStrategy::GuardWithIf + unroll(c)) through the vdelta byte-shuffle network, which assumes native-HVX-vector-sized byte data; the resulting sub-native, padded/undef-laden shuffle chain trips a recent LLVM main regression in the Hexagon backend's DAG combiner. Cast boolean vectors to i8 before interleaving (mirroring vdelta's own bool handling) and cast back afterward, avoiding the problematic pattern entirely. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
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Automated upgrade via
uv lock -P halide-llvm.