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[herd] Add LDAP/STLP instructions#1639

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RaghavRoy145:raghav-new-instructions
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[herd] Add LDAP/STLP instructions#1639
RaghavRoy145 wants to merge 2 commits intoherd:masterfrom
RaghavRoy145:raghav-new-instructions

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Thanks for this! I've got two comments.

Comment thread herd/AArch64Sem.ml Outdated
Comment thread herd/AArch64Sem.ml Outdated
@RaghavRoy145 RaghavRoy145 marked this pull request as ready for review December 24, 2025 23:05
@RaghavRoy145 RaghavRoy145 force-pushed the raghav-new-instructions branch 2 times, most recently from bee0f84 to 4ed8415 Compare January 14, 2026 20:11
Comment thread herd/AArch64Sem.ml Outdated
Comment thread herd/AArch64Sem.ml Outdated
@RaghavRoy145 RaghavRoy145 force-pushed the raghav-new-instructions branch from c700f36 to cca2846 Compare February 21, 2026 09:32
@RaghavRoy145 RaghavRoy145 requested a review from relokin February 21, 2026 10:09
@RaghavRoy145 RaghavRoy145 force-pushed the raghav-new-instructions branch from cca2846 to 650ba79 Compare February 21, 2026 16:25
@RaghavRoy145 RaghavRoy145 force-pushed the raghav-new-instructions branch from 650ba79 to 4526d7e Compare March 9, 2026 16:07
@RaghavRoy145 RaghavRoy145 force-pushed the raghav-new-instructions branch 6 times, most recently from 7fe70c9 to 0c7e519 Compare April 4, 2026 16:07
@RaghavRoy145 RaghavRoy145 force-pushed the raghav-new-instructions branch 2 times, most recently from b81e8b2 to cb76a56 Compare April 9, 2026 10:45
Comment thread herd/AArch64ASLSem.ml
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@HadrienRenaud can I please ask your opinion on the changes to this file?

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I am happy with the file as it is now.

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I am not sure we will retain backwards compatibility, but I think diyone7 will need to support the new instructions. This means we need the annotations PaL -> STLP and PaA -> LDAP. Now I think we can either keep interpreting PaI as either LDIAPP or STILP or we can split that to PaIQ and PaIL. Not that right now I can't generate a test with STILP. Neither this works:

$> diyone7 -metadata false -arch AArch64 PodWW PaIL Rfe PodRR Fre

nor this:

$> diyone7 -metadata false -arch AArch64 PodWW PaI Rfe PodRR Fre

and indeed neither annotation is valid

$> diyone7 -arch AArch64 -show annotations
 P X XL XA XAL L Q A PaL PaA PaIQ PaN Pa

Comment thread lib/AArch64Base.ml

type temporal = TT | NT
type pair_opt = Pa | PaN | PaI
type pair_opt = [`Pa | `PaN | `PaIQ | `PaIL | `PaA | `PaL]
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I don't think we should keep this type

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  • I've kept pair_opt because having separate Ld_Pair and St_Pair caused assertion failures in both add_lxm_atom and add_lxm_edge as the pretty-printers for shared variants like Pa and PaN produce identical strings, but compare_atomo sees them as different constructors.
  • Using prefixes (LdPa/StPa) breaks backward compatibility with diyone7 and user-facing tests.
  • The unified Pair at the was the only approach that preserved backward compatibility while avoiding these issues, and this needs the pair_opt type. The split into ld_pair_opt/st_pair_opt is preserved at the instruction level (I_LDP/I_STP) where direction is known, with pair_opt_to_ld and pair_opt_to_st conversion functions used in emit_access where the direction is relevant again.

Comment thread lib/AArch64Base.ml
Comment on lines +1230 to +1231
type ld_pair_opt = [`Pa | `PaN | `PaIQ | `PaA]
type st_pair_opt = [`Pa | `PaN | `PaIL | `PaL]
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why are we turning this into a Polymorphic type?

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@RaghavRoy145 RaghavRoy145 Apr 9, 2026

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I used polymorphic variants so that ld_pair_opt and st_pair_opt could share common tags (Pa, PaN) while having separate type constraints on I_LDP vs I_STP.

With regular variants, the shared constructors (Pa, PaN) would need to be duplicated across both types (e.g. LdPa/StPa, LdPaN/StPaN), and every conversion and pattern match becomes more verbose. If regular variants are preferred, it's a straightforward change. Happy to switch if there's a preference.

Comment thread lib/AArch64Base.ml Outdated
Comment thread lib/AArch64Base.ml Outdated
@@ -477,13 +477,24 @@ let is_tthm fields =
| Some Capability -> "c"

let pp_pair_opt = function
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shouldn't we also split this to a ld and st variant?

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Currently atom_acc uses the Pair of pair_opt * pair_idx.

At the instruction level, the pretty-printing of I_LDP/I_STP doesn't go through pp_pair_opt and it uses the instruction printer directly. So there's no need for split pp_ld_pair_opt/pp_st_pair_opt functions.

If we were to remove the unified pair_opt and go back to Ld_Pair/St_Pair in atom_acc, we cpould split printers, but then we'd hit the add_lxm_atom and add_lxm_edge assertion failures described above since both would produce the same strings for shared variants like Pa and PaN.

Comment thread gen/AArch64Compile_gen.ml Outdated
Comment thread gen/AArch64Compile_gen.ml Outdated
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relokin commented Apr 9, 2026

@ShaleXIONG can you please review and help with the changes to gen/?

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RaghavRoy145 commented Apr 10, 2026

I am not sure we will retain backwards compatibility, but I think diyone7 will need to support the new instructions. This means we need the annotations PaL -> STLP and PaA -> LDAP. Now I think we can either keep interpreting PaI as either LDIAPP or STILP or we can split that to PaIQ and PaIL. Not that right now I can't generate a test with STILP. Neither this works:

$> diyone7 -metadata false -arch AArch64 PodWW PaIL Rfe PodRR Fre

nor this:

$> diyone7 -metadata false -arch AArch64 PodWW PaI Rfe PodRR Fre

and indeed neither annotation is valid

$> diyone7 -arch AArch64 -show annotations
 P X XL XA XAL L Q A PaL PaA PaIQ PaN Pa

This I think is because of a bug in my PR, I failed to include "PaIL" in fold_pair (I overwrote it in the second commit)

Here is a working example after I fixed it locally:

herdtools7 % _build/install/default/bin/diyone7 -metadata false -arch AArch64 PodWW PaIL Rfe PodRR Fre
AArch64 MP+poppail+po
{
 int y[2]={0,0};
 0:X1=x; 0:X2=y;
 1:X1=x; 1:X2=y;
}
 P0               | P1          ;
 MOV W0,#1        | LDR W0,[X2] ;
 STR W0,[X1]      | LDR W3,[X1] ;
 MOV W3,#2        |             ;
 SUB W4,W3,#1     |             ;
 STILP W4,W3,[X2] |             ;

exists (1:X0=1 /\ 1:X3=0)

And here is one with STLP:

herdtools7 % _build/install/default/bin/diyone7 -metadata false -arch AArch64 PodWW PaL Rfe PodRR Fre 
AArch64 MP+poppal+po
{
 int y[2]={0,0};
 0:X1=x; 0:X2=y;
 1:X1=x; 1:X2=y;
}
 P0              | P1          ;
 MOV W0,#1       | LDR W0,[X2] ;
 STR W0,[X1]     | LDR W3,[X1] ;
 MOV W3,#2       |             ;
 SUB W4,W3,#1    |             ;
 STLP W4,W3,[X2] |             ;

exists (1:X0=1 /\ 1:X3=0)

Split pair_opt to load and store types to
allow load and store specific annotations
to be added.
Comment thread herd/AArch64ASLSem.ml Outdated
Comment thread herd/AArch64ASLSem.ml Outdated
@RaghavRoy145 RaghavRoy145 force-pushed the raghav-new-instructions branch from cb76a56 to e39f66f Compare April 10, 2026 16:21
Comment thread herd/AArch64ASLSem.ml Outdated
@RaghavRoy145 RaghavRoy145 force-pushed the raghav-new-instructions branch 4 times, most recently from 7e47f91 to 15646ab Compare April 11, 2026 16:45
@ShaleXIONG ShaleXIONG self-requested a review April 15, 2026 12:55
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3 participants