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4 changes: 2 additions & 2 deletions src/memory/brk.rs
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ pub async fn sys_brk(addr: VA) -> Result<usize, Infallible> {
// The query case `brk(0)` is special and is handled separately from modifications.
if addr.is_null() {
let current_brk_val = vm.current_brk().value();
return Ok(current_brk_val as usize);
return Ok(current_brk_val);
}

// For non-null addresses, attempt to resize the break.
Expand All @@ -39,7 +39,7 @@ pub async fn sys_brk(addr: VA) -> Result<usize, Infallible> {
// The contract is to return the current, unchanged break address.
Err(_) => {
let current_brk_val = vm.current_brk().value();
Ok(current_brk_val as usize)
Ok(current_brk_val)
}
}
}
9 changes: 3 additions & 6 deletions src/process/ptrace.rs
Original file line number Diff line number Diff line change
Expand Up @@ -123,13 +123,10 @@ impl PTrace {
None => 0,
Some(PTraceState::Running) => 0,
// No masking for real signal delivery.
Some(PTraceState::SignalTrap { signal, .. }) => {
if signal.is_stopping() {
(PTRACE_EVENT_STOP as i32) << 8
} else {
0
}
Some(PTraceState::SignalTrap { signal, .. }) if signal.is_stopping() => {
(PTRACE_EVENT_STOP as i32) << 8
}
Some(PTraceState::SignalTrap { .. }) => 0,
Some(PTraceState::TracePointHit { hit_point, .. }) => match hit_point {
TracePoint::SyscallEntry | TracePoint::SyscallExit => {
if self.sysgood {
Expand Down
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