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rv32i-single-cycle
rv32i-single-cycle PublicSingle-cycle RV32I RISC-V CPU in Verilog on a Basys 3 FPGA, running gcc-compiled C
Verilog
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tapeout-dojo
tapeout-dojo PublicA first-person 3D RPG that teaches Verilog — real in-browser compiler and simulator, gate-level schematic view, and RTL export to Tiny Tapeout. One file.
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