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8 changes: 7 additions & 1 deletion .github/workflows/test_direct.yml
Original file line number Diff line number Diff line change
Expand Up @@ -30,4 +30,10 @@ jobs:
with:
mode: "direct"
design_home: "benchs/vexriscv"
design_config: "benchs/vexriscv/synth.ys"
design_config: "benchs/vexriscv/synth.ys"

- name: Upload design.stats
uses: actions/upload-artifact@v4
with:
name: design-stats
path: design.stats
5 changes: 3 additions & 2 deletions benchs/vexriscv/synth.ys
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
set design "$::env(DESIGN_HOME)/vexriscv.demo.GenFull.v"
yosys -import
read_verilog vexriscv.demo.GenFull.v
synth_xilinx -top vexriscv.demo.GenFull
read_verilog "$design"
synth_xilinx -top vexriscv.demo.GenFull
write_verilog naja_netlist.v
20 changes: 17 additions & 3 deletions entrypoint.sh
Original file line number Diff line number Diff line change
Expand Up @@ -8,21 +8,29 @@ DESIGN_CONFIG="$3"
#LIBRARY="$4"

export YOSYS_EXE="/yosys/bin/yosys"
export DESIGN_HOME="$ROOT/$DESIGN_HOME"
export DESIGN_CONFIG="$ROOT/$DESIGN_CONFIG"

if [ "$MODE" == "orfs" ]; then
echo "Running in ORFS mode"
export DESIGN_HOME="$ROOT/$DESIGN_HOME"
echo "::group::Naja-ORFS"
echo "Naja ORFS mode selected"
#LIBERTY_FILE="/najaeda-or/flow/objects/nangate45/bp/base/lib/*.lib"
#VERILOG_FILE="/najaeda-or/flow/results/nangate45/bp/base/1_synth.v"
cd /najaeda-or/flow && make synth
#echo "Liberty file: $LIBERTY_FILE"
#echo "$(ls /najaeda-or/flow/objects/nangate45/bp/base/lib)"
echo "Verilog file: $VERILOG_FILE"
echo "::endgroup::"

echo "::group::Launching-Najaeda"
python3 /najaeda_scripts/count_leaves.py --primitives_mode="liberty" --liberty "$LIBERTY_FILE" --verilog "$VERILOG_FILE"
cp design.stats /github/workspace/design.stats
echo "::endgroup::"

echo "Done!"
else
echo "Running in direct yosys mode"
echo "::group::Naja-Direct-Yosys"
echo "Naja Direct Yosys mode selected"
echo "Yosys executable: $YOSYS_EXE"
echo "Yosys version: $($YOSYS_EXE -V)"
echo "Design config: $DESIGN_CONFIG"
Expand All @@ -33,6 +41,12 @@ else
$YOSYS_EXE -c "$DESIGN_CONFIG"
VERILOG_FILE="naja_netlist.v"
echo "Verilog file: $VERILOG_FILE"
echo "::endgroup::"

echo "::group::Launching-Najaeda"
python3 /najaeda_scripts/count_leaves.py --primitives_mode="xilinx" --verilog "$VERILOG_FILE"
cp design.stats /github/workspace/design.stats
echo "::endgroup::"

echo "Done!"
fi
3 changes: 2 additions & 1 deletion najaeda_scripts/count_leaves.py
Original file line number Diff line number Diff line change
Expand Up @@ -63,6 +63,7 @@ def parse(s):
netlist.load_liberty(liberty_files)

top = netlist.load_verilog([args.verilog])
netlist.apply_dle()

def count_leaves(instance, leaves):
if instance.is_leaf():
Expand Down Expand Up @@ -92,4 +93,4 @@ def count_leaves(instance, leaves):
design_stats_file.close()
end_time = time.time()
logging.info(f"Design stats dumped to design.stats in {end_time - start_time:.2f} seconds")
sys.exit(0)
sys.exit(0)