[PW_SID:1059075] Convert riscv to use the generic iommu page table by linux-riscv-bot · Pull Request #1520 · linux-riscv/linux

linux-riscv-bot · 2026-02-27T15:39:56Z

PR for series 1059075 applied to workflow

Name: Convert riscv to use the generic iommu page table
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1059075
Version: 4

The RISC-V format is a fairly simple 5 level page table not unlike the x86 one. It has optional support for a single contiguous page size of 64k (16 x 4k). The specification describes a 32-bit format, the general code can support it via a #define but the iommu side implementation has been left off until a user comes. Tested-by: Vincent Chen <vincent.chen@sifive.com> Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com> Tested-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

In terms of the iommu subystem the SADE/GADE feature "3.4. IOMMU updating of PTE accessed (A) and dirty (D) updates" is called dirty tracking. There is no reason to enable HW support for this, and the HW cost associated with it, unless dirty tracking is actually enabled through iommufd. It should be a dynamic feature linked to user request. Further, without implementing the read dirty ops the whole thing is pointless. Do not set DC.tc.SADE just because the HW has support for dirty tracking. Tested-by: Vincent Chen <vincent.chen@sifive.com> Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com> Tested-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

This is a fairly straightforward conversion of the RISC-V iommu driver to use the generic iommu page table code. Invalidation stays as it is now with the driver pretending to implement simple range based invalidation even though the HW is more like ARM SMMUv3 than AMD where the HW implements a single-PTE based invalidation. Future work to extend the generic invalidate mechanism to support more ARM-like semantics would benefit this driver as well. Delete the existing page table code. Tested-by: Vincent Chen <vincent.chen@sifive.com> Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com> Tested-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

This turns on a 64k page size. The "RISC-V IOMMU Architecture Specification" states: 6.4 IOMMU capabilities [..] IOMMU implementations must support the Svnapot standard extension for NAPOT Translation Contiguity. So just switch it on unconditionally. Cc: Xu Lu <luxu.kernel@bytedance.com> Tested-by: Vincent Chen <vincent.chen@sifive.com> Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com> Tested-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

The commit below added MSI related calls to the driver that depends on GENERIC_MSI_IRQ. It is possible to build RISC-V without this selected. This is also necessary to make the driver COMPILE_TEST. Fixes: d5f88ac ("iommu/riscv: Add support for platform msi") Tested-by: Vincent Chen <vincent.chen@sifive.com> Tested-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

This driver used to use a lot of page table constants from the architecture code which prevented COMPILE_TEST on other architectures. Now that iommupt provides all of the constants internally there are only two small bumps preventing COMPILE_TEST. - Use the generic functions for the riscv specific phys_to_pfn() and pfn_to_phys() - Use CONFIG_MMIOWB to block off the mmiowb() barrier - Require 64 bit because of writeq use failing compilation on 32 bit Tested-by: Vincent Chen <vincent.chen@sifive.com> Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv Reviewed-by: Tomasz Jeznach <tjeznach@rivosinc.com> Tested-by: Tomasz Jeznach <tjeznach@rivosinc.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>

linux-riscv-bot · 2026-02-27T15:46:00Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 136.75 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:05:16Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1154.22 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:33:04Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1667.07 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:33:31Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 25.20 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:34:00Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 26.90 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:34:05Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 3.70 seconds
Result: WARNING
Output:

WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#89: 
new file mode 100644

WARNING: do not add new typedefs
#113: FILE: drivers/iommu/generic_pt/fmt/defs_riscv.h:20:
+typedef pt_riscv_entry_t pt_vaddr_t;

CHECK: Please use a blank line after function/struct/union/enum declarations
#120: FILE: drivers/iommu/generic_pt/fmt/defs_riscv.h:27:
+};
+#define pt_write_attrs riscvpt_write_attrs

CHECK: Please use a blank line after function/struct/union/enum declarations
#234: FILE: drivers/iommu/generic_pt/fmt/riscv.h:89:
+}
+#define pt_table_pa riscvpt_table_pa

CHECK: Please use a blank line after function/struct/union/enum declarations
#246: FILE: drivers/iommu/generic_pt/fmt/riscv.h:101:
+}
+#define pt_entry_oa riscvpt_entry_oa

CHECK: Please use a blank line after function/struct/union/enum declarations
#252: FILE: drivers/iommu/generic_pt/fmt/riscv.h:107:
+}
+#define pt_can_have_leaf riscvpt_can_have_leaf

CHECK: Please use a blank line after function/struct/union/enum declarations
#268: FILE: drivers/iommu/generic_pt/fmt/riscv.h:123:
+}
+#define pt_entry_num_contig_lg2 riscvpt_entry_num_contig_lg2

CHECK: Please use a blank line after function/struct/union/enum declarations
#274: FILE: drivers/iommu/generic_pt/fmt/riscv.h:129:
+}
+#define pt_num_items_lg2 riscvpt_num_items_lg2

CHECK: Please use a blank line after function/struct/union/enum declarations
#283: FILE: drivers/iommu/generic_pt/fmt/riscv.h:138:
+}
+#define pt_contig_count_lg2 riscvpt_contig_count_lg2

CHECK: multiple assignments should be avoided
#290: FILE: drivers/iommu/generic_pt/fmt/riscv.h:145:
+	pts->entry = entry = READ_ONCE(tablep[pts->index]);

CHECK: Please use a blank line after function/struct/union/enum declarations
#298: FILE: drivers/iommu/generic_pt/fmt/riscv.h:153:
+}
+#define pt_load_entry_raw riscvpt_load_entry_raw

CHECK: Please use a blank line after function/struct/union/enum declarations
#330: FILE: drivers/iommu/generic_pt/fmt/riscv.h:185:
+}
+#define pt_install_leaf_entry riscvpt_install_leaf_entry

CHECK: Please use a blank line after function/struct/union/enum declarations
#342: FILE: drivers/iommu/generic_pt/fmt/riscv.h:197:
+}
+#define pt_install_table riscvpt_install_table

CHECK: Please use a blank line after function/struct/union/enum declarations
#351: FILE: drivers/iommu/generic_pt/fmt/riscv.h:206:
+}
+#define pt_attr_from_entry riscvpt_attr_from_entry

CHECK: Please use a blank line after function/struct/union/enum declarations
#393: FILE: drivers/iommu/generic_pt/fmt/riscv.h:248:
+}
+#define pt_iommu_set_prot riscvpt_iommu_set_prot

CHECK: Please use a blank line after function/struct/union/enum declarations
#418: FILE: drivers/iommu/generic_pt/fmt/riscv.h:273:
+}
+#define pt_iommu_fmt_init riscvpt_iommu_fmt_init

CHECK: Please use a blank line after function/struct/union/enum declarations
#438: FILE: drivers/iommu/generic_pt/fmt/riscv.h:293:
+}
+#define pt_iommu_fmt_hw_info riscvpt_iommu_fmt_hw_info

CHECK: Please use a blank line after function/struct/union/enum declarations
#452: FILE: drivers/iommu/generic_pt/fmt/riscv.h:307:
+};
+#define kunit_fmt_cfgs riscv_64_kunit_fmt_cfgs

total: 0 errors, 2 warnings, 16 checks, 430 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit bc41da3d4749 ("iommupt: Add the RISC-V page table format") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 2 warnings, 16 checks, 430 lines checked
CHECK: Please use a blank line after function/struct/union/enum declarations
CHECK: multiple assignments should be avoided
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
WARNING: do not add new typedefs

linux-riscv-bot · 2026-02-27T16:35:32Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 85.66 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:35:34Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.24 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:35:36Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
kdoc
Desc: Detects for kdoc errors
Duration: 0.89 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:35:38Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
module-param
Desc: Detect module_param changes
Duration: 0.25 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:35:40Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.21 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:35:42Z

Patch 1: "[v4,1/6] iommupt: Add the RISC-V page table format"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.29 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:38:16Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 137.24 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T16:56:55Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1117.26 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T17:24:11Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1634.85 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T17:24:38Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 25.47 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T17:25:07Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 26.82 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T17:25:09Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.74 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T17:26:35Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 84.20 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T17:26:37Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T17:26:39Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
kdoc
Desc: Detects for kdoc errors
Duration: 0.86 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T17:26:41Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
module-param
Desc: Detect module_param changes
Duration: 0.24 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T17:26:43Z

Patch 2: "[v4,2/6] iommu/riscv: Disable SADE"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.21 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T19:56:20Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 136.28 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:15:05Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1124.23 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:42:27Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1639.79 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:42:54Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 25.20 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:43:22Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 26.34 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:43:24Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 1.18 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:44:50Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 84.16 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:44:52Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.22 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:44:54Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
kdoc
Desc: Detects for kdoc errors
Duration: 0.89 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:44:56Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
module-param
Desc: Detect module_param changes
Duration: 0.25 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:44:57Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.21 seconds
Result: PASS

linux-riscv-bot · 2026-02-27T20:44:59Z

Patch 6: "[v4,6/6] iommu/riscv: Allow RISC_VIOMMU to COMPILE_TEST"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.29 seconds
Result: PASS

Linux RISC-V bot and others added 7 commits February 27, 2026 03:49

Adding CI files

a110602

linux-riscv-bot force-pushed the workflow branch 15 times, most recently from 7e26e01 to ba6737c Compare March 6, 2026 18:45

linux-riscv-bot force-pushed the workflow branch from ba6737c to abccef3 Compare March 6, 2026 21:57

linux-riscv-bot closed this Mar 7, 2026

linux-riscv-bot deleted the pw1059075 branch March 7, 2026 01:18

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