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[PW_SID:1061776] selftests: riscv: Fix compilation issues for v_ptrace and cfi #1558

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[PW_SID:1061776] selftests: riscv: Fix compilation issues for v_ptrace and cfi #1558

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88bccbc
selftests: riscv: Add definition of BIT() macro
thecharlesjenkins Mar 5, 2026
f2fef62
selftests: riscv: Add braces around EXPECT_EQ()
thecharlesjenkins Mar 5, 2026
e5ed7b5
riscv: ptrace: Fix BIT() compilation issues
thecharlesjenkins Mar 5, 2026
eb57545
selftests: riscv: Add license to cfi selftest
thecharlesjenkins Mar 5, 2026
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1 change: 1 addition & 0 deletions arch/riscv/include/uapi/asm/ptrace.h
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Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@

#ifndef __ASSEMBLER__

#include <linux/bits.h>
#include <linux/types.h>

#define PTRACE_GETFDPIC 33
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2 changes: 2 additions & 0 deletions tools/testing/selftests/riscv/cfi/Makefile
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Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
# SPDX-License-Identifier: GPL-2.0

CFLAGS += $(KHDR_INCLUDES)
CFLAGS += -I$(top_srcdir)/tools/include

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2 changes: 2 additions & 0 deletions tools/testing/selftests/riscv/vector/Makefile
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Expand Up @@ -2,6 +2,8 @@
# Copyright (C) 2021 ARM Limited
# Originally tools/testing/arm64/abi/Makefile

CFLAGS += -I$(top_srcdir)/tools/include

TEST_GEN_PROGS := v_initval vstate_prctl vstate_ptrace validate_v_ptrace
TEST_GEN_PROGS_EXTENDED := vstate_exec_nolibc v_exec_initval_nolibc
TEST_GEN_LIBS := v_helpers.c sys_hwprobe.c
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16 changes: 10 additions & 6 deletions tools/testing/selftests/riscv/vector/validate_v_ptrace.c
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Expand Up @@ -6,6 +6,7 @@
#include <unistd.h>
#include <errno.h>

#include <linux/bits.h>
#include <linux/ptrace.h>
#include <linux/elf.h>

Expand Down Expand Up @@ -290,10 +291,11 @@ TEST(ptrace_v_syscall_clobbering)

/* verify initial vsetvli settings */

if (is_xtheadvector_supported())
if (is_xtheadvector_supported()) {
EXPECT_EQ(5UL, regset_data->vtype);
else
} else {
EXPECT_EQ(9UL, regset_data->vtype);
}

EXPECT_EQ(regset_data->vlenb, regset_data->vl);
EXPECT_EQ(vlenb, regset_data->vlenb);
Expand Down Expand Up @@ -619,10 +621,11 @@ TEST_F(v_csr_invalid, ptrace_v_invalid_values)

/* verify initial vsetvli settings */

if (is_xtheadvector_supported())
if (is_xtheadvector_supported()) {
EXPECT_EQ(5UL, regset_data->vtype);
else
} else {
EXPECT_EQ(9UL, regset_data->vtype);
}

EXPECT_EQ(regset_data->vlenb, regset_data->vl);
EXPECT_EQ(vlenb, regset_data->vlenb);
Expand Down Expand Up @@ -827,10 +830,11 @@ TEST_F(v_csr_valid, ptrace_v_valid_values)

/* verify initial vsetvli settings */

if (is_xtheadvector_supported())
if (is_xtheadvector_supported()) {
EXPECT_EQ(5UL, regset_data->vtype);
else
} else {
EXPECT_EQ(9UL, regset_data->vtype);
}

EXPECT_EQ(regset_data->vlenb, regset_data->vl);
EXPECT_EQ(vlenb, regset_data->vlenb);
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