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[PW_SID:1066474] riscv: Simplify assignment for UTS_MACHINE #1606

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[PW_SID:1066474] riscv: Simplify assignment for UTS_MACHINE #1606

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4 changes: 2 additions & 2 deletions arch/riscv/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,6 @@ endif
export BITS
ifeq ($(CONFIG_ARCH_RV64I),y)
BITS := 64
UTS_MACHINE := riscv64

KBUILD_CFLAGS += -mabi=lp64
KBUILD_AFLAGS += -mabi=lp64
Expand All @@ -39,13 +38,14 @@ ifeq ($(CONFIG_ARCH_RV64I),y)
-Cno-redzone
else
BITS := 32
UTS_MACHINE := riscv32

KBUILD_CFLAGS += -mabi=ilp32
KBUILD_AFLAGS += -mabi=ilp32
KBUILD_LDFLAGS += -melf32lriscv
endif

UTS_MACHINE := riscv$(BITS)

# LLVM has an issue with target-features and LTO: https://github.com/llvm/llvm-project/issues/59350
# Ensure it is aware of linker relaxation with LTO, otherwise relocations may
# be incorrect: https://github.com/llvm/llvm-project/issues/65090
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