[PW_SID:1076388] futex: Use runtime constants for futex_hash computation#1711
[PW_SID:1076388] futex: Use runtime constants for futex_hash computation#1711linux-riscv-bot wants to merge 22 commits into
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Fix various typos in RISC-V architecture code and comments. The following changes are included: - arch/riscv/errata/thead/errata.c: "futher" → "further" - arch/riscv/include/asm/atomic.h: "therefor" → "therefore", "arithmatic" → "arithmetic" - arch/riscv/include/asm/elf.h: "availiable" → "available", "coorespends" → "corresponds" - arch/riscv/include/asm/processor.h: "requries" → "is required" - arch/riscv/include/asm/thread_info.h: "returing" → "returning" - arch/riscv/kernel/acpi.c: "compliancy" → "compliance" - arch/riscv/kernel/ftrace.c: "therefor" → "therefore" - arch/riscv/kernel/head.S: "intruction" → "instruction" - arch/riscv/kernel/mcount-dyn.S: "localtion → "location" - arch/riscv/kernel/module-sections.c: "maxinum" → "maximum" - arch/riscv/kernel/probes/kprobes.c: "reenabled" → "re-enabled" - arch/riscv/kernel/probes/uprobes.c: "probbed" → "probed" - arch/riscv/kernel/soc.c: "extremly" → "extremely" - arch/riscv/kernel/suspend.c: "incosistent" → "inconsistent" - arch/riscv/kvm/tlb.c: "cahce" → "cache" - arch/riscv/kvm/vcpu_pmu.c: "indicies" → "indices" - arch/riscv/lib/csum.c: "implmentations" → "implementations" - arch/riscv/lib/memmove.S: "ammount" → "amount" - arch/riscv/mm/cacheflush.c: "visable" → "visible" - arch/riscv/mm/physaddr.c: "aginst" → "against" Signed-off-by: Sean Chang <seanwascoding@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260212163325.60389-1-seanwascoding@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
Commit f1a0a37 ("sched/core: Initialize the idle task with preemption disabled") removed a call to preempt_disable(), but not the associated comment. Remove the outdated comment. Fixes: f1a0a37 ("sched/core: Initialize the idle task with preemption disabled") Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://patch.msgid.link/20260204-riscv-smp-comment-update-2026-01-v1-1-8b77aa181530@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
local_flush_icache_all() only flushes and synchronizes the *instruction* cache, not the data cache. Since RISC-V does have a cbo.flush instruction for data cache flush, clarify the comment to avoid confusion. Fixes: 58661a3 ("riscv: Flush the instruction cache during SMP bringup") Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://patch.msgid.link/20260204-riscv-smp-comment-update-2026-01-v1-2-8b77aa181530@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
The kaslr_offset() function is a simple accessor that returns kernel_map.virt_offset. This commit change also ensures that kaslr_offset() is consistently available across various kernel configurations without requiring explicit linkage to mm/init.c. Signed-off-by: Austin Kim <austin.kim@lge.com> Link: https://patch.msgid.link/aYwJ76yHaMbbQVJA@adminpc-PowerEdge-R7525 Signed-off-by: Paul Walmsley <pjw@kernel.org>
The following options are required by the kdump crash utility for RISC-V
based vmcore file:
- kaslr: If the vmcore is generated from a KASLR-enabled Linux kernel,
the KASLR offset is required for the crash utility to load
the vmcore. Without the proper kaslr option, the crash utility
fails to load the vmcore file.
- satp: The exact root page table address helps determine the correct base
PGD address.
With this patch, RISC-V VMCOREINFO ELF notes now include both kaslr
and satp information.
Signed-off-by: Austin Kim <austin.kim@lge.com>
Link: https://patch.msgid.link/aYwKUE3ZzN7/ZY/A@adminpc-PowerEdge-R7525
Signed-off-by: Paul Walmsley <pjw@kernel.org>
Fix several bugs in the RISC-V kgdb implementation: - The element of dbg_reg_def[] that is supposed to pertain to the S1 register embeds instead the struct pt_regs offset of the A1 register. Fix this to use the S1 register offset in struct pt_regs. - The sleeping_thread_to_gdb_regs() function copies the value of the S10 register into the gdb_regs[] array element meant for the S9 register, and copies the value of the S11 register into the array element meant for the S10 register. It also neglects to copy the value of the S11 register. Fix all of these issues. Fixes: fe89bd2 ("riscv: Add KGDB support") Cc: Vincent Chen <vincent.chen@sifive.com> Link: https://patch.msgid.link/fde376f8-bcfd-bfe4-e467-07d8f7608d05@kernel.org Signed-off-by: Paul Walmsley <pjw@kernel.org>
Similarly to commit 8d09e2d ("arm64: patching: avoid early page_to_phys()"), avoid using phys_to_page() for the kernel address case in patch_map(). Since this is called from apply_boot_alternatives() in setup_arch(), and commit 4267739 ("arch, mm: consolidate initialization of SPARSE memory model") has moved sparse_init() to after setup_arch(), phys_to_page() is not available there yet, and it panics on boot with SPARSEMEM on RV32, which does not use SPARSEMEM_VMEMMAP. Reported-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Closes: https://lore.kernel.org/r/20260223144108-dcace0b9-02e8-4b67-a7ce-f263bed36f26@linutronix.de/ Fixes: 4267739 ("arch, mm: consolidate initialization of SPARSE memory model") Suggested-by: Mike Rapoport <rppt@kernel.org> Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Acked-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Tested-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Link: https://patch.msgid.link/20260310-riscv-sparsemem-alternatives-fix-v1-1-659d5dd257e2@iscas.ac.cn [pjw@kernel.org: fix the subject line to align with the patch description] Signed-off-by: Paul Walmsley <pjw@kernel.org>
The BITS variable conveniently allows to simplify the assignment for UTS_MACHINE. Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/20260313164012.1153936-2-u.kleine-koenig@baylibre.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
The BIT() macros is used by the validate_v_ptrace() test case, but not defined. Include linux/bits.h to pull in this definition. To ensure that the header in the kernel source is used, add tools/include to the header search path. Fixes: 30eb191 ("selftests: riscv: verify ptrace rejects invalid vector csr inputs") Signed-off-by: Charlie Jenkins <thecharlesjenkins@gmail.com> Reviewed-and-tested-by: Sergey Matyukevich <geomatsi@gmail.com> Link: https://patch.msgid.link/20260309-fix_selftests-v2-1-9d5a553a531e@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
BIT() is being used in ptrace.h without a definition, resulting in compilation errors in tools/testing/selftests/riscv/cfi/cfitests.c: cfitests.c:101:60: error: implicit declaration of function ‘BIT’ [-Wimplicit-function-declaration] 101 | if ((cfi_reg.cfi_status.cfi_state & CFI_ENABLE_MASK) != CFI_ENABLE_MASK) Include linux/bits.h to resolve this issue. Fixes: 2af7c9c ("riscv/ptrace: expose riscv CFI status and state via ptrace and in core files") Signed-off-by: Charlie Jenkins <thecharlesjenkins@gmail.com> Reviewed-by: Deepak Gupta <debug@rivosinc.com> Link: https://patch.msgid.link/20260309-fix_selftests-v2-3-9d5a553a531e@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
The cfi selftest was missing a license so add it. Signed-off-by: Charlie Jenkins <thecharlesjenkins@gmail.com> Reviewed-by: Deepak Gupta <debug@rivosinc.com> Link: https://patch.msgid.link/20260309-fix_selftests-v2-4-9d5a553a531e@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
In the arch/riscv/Kconfig, the HOTPLUG_CPU depends on SMP, hence if the HOTPLUG_CPU is defined, the SMP has to be defined, it is not necessary to check SMP here. Signed-off-by: Hui Wang <hui.wang@canonical.com> Link: https://patch.msgid.link/20260304033403.238012-1-hui.wang@canonical.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
The cpu-hotplug.c only is built when CONFIG_HOTPLUG_CPU is defined, it is not needed to check HOTPLUG_CPU in this file. Signed-off-by: Hui Wang <hui.wang@canonical.com> Link: https://patch.msgid.link/20260304033403.238012-2-hui.wang@canonical.com [pjw@kernel.org: removed extra whitespace at EOF] Signed-off-by: Paul Walmsley <pjw@kernel.org>
Similar as commit 284922f ("x86: uaccess: don't use runtime-const rewriting in modules") does, make riscv's runtime const not usable by modules too, to "make sure this doesn't get forgotten the next time somebody wants to do runtime constant optimizations". The reason is well explained in the above commit: "The runtime-const infrastructure was never designed to handle the modular case, because the constant fixup is only done at boot time for core kernel code." Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Link: https://patch.msgid.link/20260221023731.3476-1-jszhang@kernel.org Signed-off-by: Paul Walmsley <pjw@kernel.org>
Futex hash computation requires a mask operation with read-only after init data that will be converted to a runtime constant in the subsequent commit. Introduce runtime_const_mask_32 to further optimize the mask operation in the futex hash computation hot path. [ prateek: Broke off the x86 chunk, commit message. ] Link: https://patch.msgid.link/20260227161841.GH606826@noisy.programming.kicks-ass.net Not-yet-signed-off-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: K Prateek Nayak <kprateek.nayak@amd.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The current scheme to directly patch the kernel text for runtime
constants runs into the following issue with futex adapted to using
runtime constants on arm64:
Unable to handle kernel write to read-only memory at virtual address ...
The pc points to the *p assignment in the following call chain:
futex_init()
runtime_const_init(shift, __futex_shift)
__runtime_fixup_shift()
*p = cpu_to_le32(insn);
which suggests that core_initcall() is too late to patch the kernel text
directly unlike the "d_hash_shift" which is initialized during
vfs_caches_init_early() before the protections are in place.
Use aarch64_insn_patch_text_nosync() to patch the runtime constants
instead of doing it directly to allow runtime_const_init() slightly
later into the boot.
Since aarch64_insn_patch_text_nosync() calls caches_clean_inval_pou()
internally, __runtime_fixup_caches() ends up being redundant.
runtime_const_init() are rare and the overheads of multiple calls to
caches_clean_inval_pou() instead of batching them together should be
negligible in practice.
The cpu_to_le32() conversion of instruction isn't necessary since it is
handled later in the aarch64_insn_patch_text_nosync() call-chain:
aarch64_insn_patch_text_nosync(addr, insn)
aarch64_insn_write(addr, insn)
__aarch64_insn_write(addr, cpu_to_le32(insn))
Signed-off-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Futex hash computation requires a mask operation with read-only after init data that will be converted to a runtime constant in the subsequent commit. Introduce runtime_const_mask_32 to further optimize the mask operation in the futex hash computation hot path. GCC generates a: movz w1, #lo16, lsl #0 // w1 = bits [15:0] movk w1, #hi16, lsl #16 // w1 = full 32-bit value and w0, w0, w1 // w0 = w0 & w1 pattern to tackle arbitrary 32-bit masks and the same was also suggested by Claude which is implemented here. The (__mask & value) operation is intentiaonally placed outside of asm block to allow compilers to further optimize it if possible. __runtime_fixup_ptr() already patches a "movz, + movk lsl #16" sequence which has been reused to patch the same sequence for __runtime_fixup_mask(). Assisted-by: Claude:claude-sonnet-4-5 Signed-off-by: K Prateek Nayak <kprateek.nayak@amd.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Futex hash computation requires a mask operation with read-only after init data that will be converted to a runtime constant in the subsequent commit. Introduce runtime_const_mask_32 to further optimize the mask operation in the futex hash computation hot path. GCC generates a: lui a0, 0x12346 # upper; +0x800 then >>12 for correct rounding addi a0, a0, 0x678 # lower 12 bits and a1, a1, a0 # a1 = a1 & a0 pattern to tackle arbitrary 32-bit masks and the same was also suggested by Claude which is implemented here. The (__mask & val) operation is intentionally placed outside of asm block to allow compilers to further optimize it if possible. __runtime_fixup_ptr() already patches a "lui + addi" sequence which has been reused to patch the same sequence for __runtime_fixup_mask(). Assisted-by: Claude:claude-sonnet-4-5 Signed-off-by: K Prateek Nayak <kprateek.nayak@amd.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Futex hash computation requires a mask operation with read-only after init data that will be converted to a runtime constant in the subsequent commit. Introduce runtime_const_mask_32 to further optimize the mask operation in the futex hash computation hot path. GCC generates a: nilf %r1,<imm32> to tackle arbitrary 32-bit masks and the same is implemented here. Immediate patching pattern for __runtime_fixup_mask() has been adopted from __runtime_fixup_ptr(). Acked-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: K Prateek Nayak <kprateek.nayak@amd.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add a dummy runtime_const_mask_32() for all the architectures that do not support runtime-const. Link: https://patch.msgid.link/20260227161841.GH606826@noisy.programming.kicks-ass.net Not-yet-signed-off-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: K Prateek Nayak <kprateek.nayak@amd.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Runtime constify the read-only after init data __futex_shift(shift_32),
__futex_mask(mask_32), and __futex_queues(ptr) used in __futex_hash()
hot path to avoid referencing global variable.
This also allows __futex_queues to be allocated dynamically to
"nr_node_ids" slots instead of reserving config dependent MAX_NUMNODES
(1 << CONFIG_NODES_SHIFT) worth of slots upfront.
No functional chages intended.
[ prateek: Dynamically allocate __futex_queues, mark the global data
__ro_after_init since they are constified after futex_init(). ]
Link: https://patch.msgid.link/20260227161841.GH606826@noisy.programming.kicks-ass.net
Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> # MAX_NUMNODES bloat
Not-yet-signed-off-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v3,1/7] x86/runtime-const: Introduce runtime_const_mask_32()" |
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Patch 1: "[v3,1/7] x86/runtime-const: Introduce runtime_const_mask_32()" |
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Patch 1: "[v3,1/7] x86/runtime-const: Introduce runtime_const_mask_32()" |
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Patch 1: "[v3,1/7] x86/runtime-const: Introduce runtime_const_mask_32()" |
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Patch 1: "[v3,1/7] x86/runtime-const: Introduce runtime_const_mask_32()" |
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Patch 1: "[v3,1/7] x86/runtime-const: Introduce runtime_const_mask_32()" |
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Patch 1: "[v3,1/7] x86/runtime-const: Introduce runtime_const_mask_32()" |
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Patch 1: "[v3,1/7] x86/runtime-const: Introduce runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 6: "[v3,6/7] asm-generic/runtime-const: Add dummy runtime_const_mask_32()" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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Patch 7: "[v3,7/7] futex: Use runtime constants for __futex_hash() hot path" |
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PR for series 1076388 applied to workflow__riscv__for-next
Name: futex: Use runtime constants for futex_hash computation
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1076388
Version: 3