[PW_SID:1076727] [v2] cmpxchg: allow const-qualified old value in cmpxchg()#1714
[PW_SID:1076727] [v2] cmpxchg: allow const-qualified old value in cmpxchg()#1714linux-riscv-bot wants to merge 13 commits into
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Fix various typos in RISC-V architecture code and comments. The following changes are included: - arch/riscv/errata/thead/errata.c: "futher" → "further" - arch/riscv/include/asm/atomic.h: "therefor" → "therefore", "arithmatic" → "arithmetic" - arch/riscv/include/asm/elf.h: "availiable" → "available", "coorespends" → "corresponds" - arch/riscv/include/asm/processor.h: "requries" → "is required" - arch/riscv/include/asm/thread_info.h: "returing" → "returning" - arch/riscv/kernel/acpi.c: "compliancy" → "compliance" - arch/riscv/kernel/ftrace.c: "therefor" → "therefore" - arch/riscv/kernel/head.S: "intruction" → "instruction" - arch/riscv/kernel/mcount-dyn.S: "localtion → "location" - arch/riscv/kernel/module-sections.c: "maxinum" → "maximum" - arch/riscv/kernel/probes/kprobes.c: "reenabled" → "re-enabled" - arch/riscv/kernel/probes/uprobes.c: "probbed" → "probed" - arch/riscv/kernel/soc.c: "extremly" → "extremely" - arch/riscv/kernel/suspend.c: "incosistent" → "inconsistent" - arch/riscv/kvm/tlb.c: "cahce" → "cache" - arch/riscv/kvm/vcpu_pmu.c: "indicies" → "indices" - arch/riscv/lib/csum.c: "implmentations" → "implementations" - arch/riscv/lib/memmove.S: "ammount" → "amount" - arch/riscv/mm/cacheflush.c: "visable" → "visible" - arch/riscv/mm/physaddr.c: "aginst" → "against" Signed-off-by: Sean Chang <seanwascoding@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260212163325.60389-1-seanwascoding@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
Commit f1a0a37 ("sched/core: Initialize the idle task with preemption disabled") removed a call to preempt_disable(), but not the associated comment. Remove the outdated comment. Fixes: f1a0a37 ("sched/core: Initialize the idle task with preemption disabled") Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://patch.msgid.link/20260204-riscv-smp-comment-update-2026-01-v1-1-8b77aa181530@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
local_flush_icache_all() only flushes and synchronizes the *instruction* cache, not the data cache. Since RISC-V does have a cbo.flush instruction for data cache flush, clarify the comment to avoid confusion. Fixes: 58661a3 ("riscv: Flush the instruction cache during SMP bringup") Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Link: https://patch.msgid.link/20260204-riscv-smp-comment-update-2026-01-v1-2-8b77aa181530@iscas.ac.cn Signed-off-by: Paul Walmsley <pjw@kernel.org>
The kaslr_offset() function is a simple accessor that returns kernel_map.virt_offset. This commit change also ensures that kaslr_offset() is consistently available across various kernel configurations without requiring explicit linkage to mm/init.c. Signed-off-by: Austin Kim <austin.kim@lge.com> Link: https://patch.msgid.link/aYwJ76yHaMbbQVJA@adminpc-PowerEdge-R7525 Signed-off-by: Paul Walmsley <pjw@kernel.org>
The following options are required by the kdump crash utility for RISC-V
based vmcore file:
- kaslr: If the vmcore is generated from a KASLR-enabled Linux kernel,
the KASLR offset is required for the crash utility to load
the vmcore. Without the proper kaslr option, the crash utility
fails to load the vmcore file.
- satp: The exact root page table address helps determine the correct base
PGD address.
With this patch, RISC-V VMCOREINFO ELF notes now include both kaslr
and satp information.
Signed-off-by: Austin Kim <austin.kim@lge.com>
Link: https://patch.msgid.link/aYwKUE3ZzN7/ZY/A@adminpc-PowerEdge-R7525
Signed-off-by: Paul Walmsley <pjw@kernel.org>
Fix several bugs in the RISC-V kgdb implementation: - The element of dbg_reg_def[] that is supposed to pertain to the S1 register embeds instead the struct pt_regs offset of the A1 register. Fix this to use the S1 register offset in struct pt_regs. - The sleeping_thread_to_gdb_regs() function copies the value of the S10 register into the gdb_regs[] array element meant for the S9 register, and copies the value of the S11 register into the array element meant for the S10 register. It also neglects to copy the value of the S11 register. Fix all of these issues. Fixes: fe89bd2 ("riscv: Add KGDB support") Cc: Vincent Chen <vincent.chen@sifive.com> Link: https://patch.msgid.link/fde376f8-bcfd-bfe4-e467-07d8f7608d05@kernel.org Signed-off-by: Paul Walmsley <pjw@kernel.org>
Similarly to commit 8d09e2d ("arm64: patching: avoid early page_to_phys()"), avoid using phys_to_page() for the kernel address case in patch_map(). Since this is called from apply_boot_alternatives() in setup_arch(), and commit 4267739 ("arch, mm: consolidate initialization of SPARSE memory model") has moved sparse_init() to after setup_arch(), phys_to_page() is not available there yet, and it panics on boot with SPARSEMEM on RV32, which does not use SPARSEMEM_VMEMMAP. Reported-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Closes: https://lore.kernel.org/r/20260223144108-dcace0b9-02e8-4b67-a7ce-f263bed36f26@linutronix.de/ Fixes: 4267739 ("arch, mm: consolidate initialization of SPARSE memory model") Suggested-by: Mike Rapoport <rppt@kernel.org> Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Acked-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Tested-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Link: https://patch.msgid.link/20260310-riscv-sparsemem-alternatives-fix-v1-1-659d5dd257e2@iscas.ac.cn [pjw@kernel.org: fix the subject line to align with the patch description] Signed-off-by: Paul Walmsley <pjw@kernel.org>
The BITS variable conveniently allows to simplify the assignment for UTS_MACHINE. Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/20260313164012.1153936-2-u.kleine-koenig@baylibre.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
The BIT() macros is used by the validate_v_ptrace() test case, but not defined. Include linux/bits.h to pull in this definition. To ensure that the header in the kernel source is used, add tools/include to the header search path. Fixes: 30eb191 ("selftests: riscv: verify ptrace rejects invalid vector csr inputs") Signed-off-by: Charlie Jenkins <thecharlesjenkins@gmail.com> Reviewed-and-tested-by: Sergey Matyukevich <geomatsi@gmail.com> Link: https://patch.msgid.link/20260309-fix_selftests-v2-1-9d5a553a531e@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
BIT() is being used in ptrace.h without a definition, resulting in compilation errors in tools/testing/selftests/riscv/cfi/cfitests.c: cfitests.c:101:60: error: implicit declaration of function ‘BIT’ [-Wimplicit-function-declaration] 101 | if ((cfi_reg.cfi_status.cfi_state & CFI_ENABLE_MASK) != CFI_ENABLE_MASK) Include linux/bits.h to resolve this issue. Fixes: 2af7c9c ("riscv/ptrace: expose riscv CFI status and state via ptrace and in core files") Signed-off-by: Charlie Jenkins <thecharlesjenkins@gmail.com> Reviewed-by: Deepak Gupta <debug@rivosinc.com> Link: https://patch.msgid.link/20260309-fix_selftests-v2-3-9d5a553a531e@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
The cfi selftest was missing a license so add it. Signed-off-by: Charlie Jenkins <thecharlesjenkins@gmail.com> Reviewed-by: Deepak Gupta <debug@rivosinc.com> Link: https://patch.msgid.link/20260309-fix_selftests-v2-4-9d5a553a531e@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
The old value passed to cmpxchg() is semantically read-only: it is only loaded into a register as a comparand and is never written back. However, the macro currently assigns it implicitly to a local variable of type __typeof__(*(ptr)), which triggers -Werror=discarded-qualifiers when old is a const-qualified pointer and ptr points to a non-const type. Fix this by using __auto_type with the conditional expression trick: __auto_type _o_ = 1 ? (o) : *(ptr); The __auto_type deduces the type from the expression, so _o_ naturally takes the const-qualified type when o is const-qualified, avoiding the discarded-qualifiers warning. The conditional expression forces the compiler to verify that o and *(ptr) have compatible types, preserving the type-safety check that a bare __auto_type _o_ = (o) would lose. Since the condition is the constant 1, the compiler optimizes away the *(ptr) branch entirely with no runtime cost. For macros where ptr is already captured in a local variable (arc's _p_, hexagon's __ptr, riscv's __ptr), the captured variable is used in the conditional expression to avoid re-evaluating ptr. The new value is intentionally left without this treatment: new will be stored into *ptr, so silently accepting a const-qualified new would allow callers to store a pointer-to-const into a non-const location without any compiler warning. Suggested-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Hangbin Liu <liuhangbin@gmail.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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Patch 1: "[v2] cmpxchg: allow const-qualified old value in cmpxchg()" |
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PR for series 1076727 applied to workflow__riscv__fixes
Name: [v2] cmpxchg: allow const-qualified old value in cmpxchg()
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1076727
Version: 2