[PW_SID:1090870] Add TH1520 USB support#1878
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TH1520 has a subsystem clock controller called MISC_SUBSYS in its manual, mainly controlling clocks for USB and MMC/SD in non-TEE environment. Add device tree binding for it. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The TH1520 SoC contains a MISC_SUBSYS clock controller, which allows controlling of USB related clocks and MMC/SD controller AHB bus clocks. Add support for this clock controller, in order to enable USB support. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The MISC_SUBSYS clock controller on TH1520 SoC is a clock controller mainly controlling USB-related clocks (which isn't utilized yet) and MMC/SD controllers' AHB bus clocks. Add the device tree node for it along with the missing bus clock references for MMC/SD controllers. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The TH1520 SoC features a Synopsys USB 3.0 FemtoPHY with some custom glue logic configuring PHY parameters. Add a binding for it. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The USB PHY on T-Head TH1520 SoC is a Synopsys USB 3.0 FemtoPHY, with some PHY parameters exported as another system controller along with it. As a few PHY parameters' default value isn't ready to work, add a driver configuring them before letting the PHY run, in addition to clock/reset/regulator management. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The TH1520 SoC contains a Synopsys DesignWare Cores SuperSpeed USB3.0 Dual Role Device controller in addition to a USB2+USB3 combo PHY based on Synopsys USB3.0 FemtoPHY. Add device tree nodes for them. The USB controller is quite generic, new and properly configured during silicon design, but the PHY is a little quirky. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
GPIO hogs are described in the gpio.txt binding as automatic default GPIO configuration items. Allow them for GPIO ports in DesignWare APB GPIO controller nodes. Cc: Hoan Tran <hoan@os.amperecomputing.com> Cc: Linus Walleij <linusw@kernel.org> Cc: Bartosz Golaszewski <brgl@kernel.org> Cc: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
As a USB hub device, VL817 can surely be connected to external USB connectors. The binding for such connectors connection is already described in the generic usb-hub.yaml binding with ports subnode, but it's not yet allowed in the VL817 binding. Switch the reference binding from usb-device.yaml to usb-hub.yaml (which recursively references usb-device.yaml and contains definition for ports subnode) and allow ports subnode in VL817 binding. Cc: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Although "D" and "H" are earlier in the alphabet than "P", the DPU and HDMI nodes were added after PADCTRL node in the Lichee Pi 4A device tree. Sort the nodes in this device tree. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add nodes for the six I2C on the T-Head TH1520 RISCV SoC. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> Reviewed-by: Drew Fustini <dfustini@tenstorrent.com> [Icenowy: rebase on top of v7.1-rc2] Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Lichee Pi 4A has 3 I2C IO expansion chips onboard, connected to the I2C0/1/3 busses. Add device tree nodes for them. Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> [Icenowy: added commit description] Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The Lichee Pi 4A board features an onboard VIA VL817 hub connected to the SoC's USB3 as upstream and 4 USB-3.0-capable Type-A ports as downstream. Enable SoC USB3 and the hub on Lichee Pi 4A. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 1: "[01/12] dt-bindings: clock: thead: add TH1520 MISC subsys clock controller" |
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Patch 2: "[02/12] clk: thead: th1520-ap: add support for MISC subsys clocks" |
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Patch 2: "[02/12] clk: thead: th1520-ap: add support for MISC subsys clocks" |
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Patch 2: "[02/12] clk: thead: th1520-ap: add support for MISC subsys clocks" |
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Patch 2: "[02/12] clk: thead: th1520-ap: add support for MISC subsys clocks" |
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Patch 2: "[02/12] clk: thead: th1520-ap: add support for MISC subsys clocks" |
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Patch 2: "[02/12] clk: thead: th1520-ap: add support for MISC subsys clocks" |
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Patch 10: "[10/12] riscv: dts: thead: Add TH1520 I2C nodes" |
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Patch 10: "[10/12] riscv: dts: thead: Add TH1520 I2C nodes" |
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Patch 10: "[10/12] riscv: dts: thead: Add TH1520 I2C nodes" |
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Patch 10: "[10/12] riscv: dts: thead: Add TH1520 I2C nodes" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 11: "[11/12] riscv: dts: thead: Add Lichee Pi 4A IO expansions" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
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Patch 12: "[12/12] riscv: dts: thead: enable USB3 ports on Lichee Pi 4A" |
PR for series 1090870 applied to workflow__riscv__fixes
Name: Add TH1520 USB support
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1090870
Version: 1