[PW_SID:1093343] iommu/riscv: Support Svpbmt memory types in generic_pt#1915
[PW_SID:1093343] iommu/riscv: Support Svpbmt memory types in generic_pt#1915linux-riscv-bot wants to merge 3 commits into
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The RISC-V IOMMU can optionally support Svpbmt page-based memory types in its page table format. When present,the generic page table code can use this capability to encode memory attributes (e.g. MMIO vs normal memory) in PTEs. Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
When the RISC-V IOMMU page table format support Svpbmt, PBMT provides a way to tag mappings with page-based memory types. Encode memory type via PBMT in RISC-V IOMMU PTEs: - IOMMU_MMIO -> PBMT=IO - !IOMMU_MMIO && !IOMMU_CACHE -> PBMT=NC - otherwise -> PBMT=Normal (PBMT=0) Only touch PBMT when PT_FEAT_RISCV_SVPBMT is advertised. Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Anup Patel <anup@brainfault.org> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 1: "[v4,1/2] iommu/riscv: Advertise Svpbmt support to generic page table" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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Patch 2: "[v4,2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits" |
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PR for series 1093343 applied to workflow__riscv__fixes
Name: iommu/riscv: Support Svpbmt memory types in generic_pt
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1093343
Version: 4