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17 changes: 12 additions & 5 deletions Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -14,11 +14,15 @@ allOf:

properties:
compatible:
enum:
- marvell,pxa250-pwm
- marvell,pxa270-pwm
- marvell,pxa168-pwm
- marvell,pxa910-pwm
oneOf:
- enum:
- marvell,pxa250-pwm
- marvell,pxa270-pwm
- marvell,pxa168-pwm
- marvell,pxa910-pwm
- items:
- const: spacemit,k1-pwm
- const: marvell,pxa910-pwm

reg:
# Length should be 0x10
Expand All @@ -31,6 +35,9 @@ properties:
clocks:
maxItems: 1

resets:
maxItems: 1

required:
- compatible
- reg
Expand Down
7 changes: 7 additions & 0 deletions arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -17,4 +17,11 @@
drive-strength = <32>;
};
};
pwm14_1_cfg: pwm14-1-cfg {
pwm14-1-pins {
pinmux = <K1_PADCONF(44, 4)>;
bias-pull-up = <0>;
drive-strength = <32>;
};
};
};
180 changes: 180 additions & 0 deletions arch/riscv/boot/dts/spacemit/k1.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -448,5 +448,185 @@
reg-io-width = <4>;
status = "reserved"; /* for TEE usage */
};

pwm0: pwm@d401a000 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd401a000 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM0>;
resets = <&syscon_apbc RESET_PWM0>;
status = "disabled";
};

pwm1: pwm@d401a400 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd401a400 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM1>;
resets = <&syscon_apbc RESET_PWM1>;
status = "disabled";
};

pwm2: pwm@d401a800 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd401a800 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM2>;
resets = <&syscon_apbc RESET_PWM2>;
status = "disabled";
};

pwm3: pwm@d401ac00 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd401ac00 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM3>;
resets = <&syscon_apbc RESET_PWM3>;
status = "disabled";
};

pwm4: pwm@d401b000 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd401b000 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM4>;
resets = <&syscon_apbc RESET_PWM4>;
status = "disabled";
};

pwm5: pwm@d401b400 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd401b400 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM5>;
resets = <&syscon_apbc RESET_PWM5>;
status = "disabled";
};

pwm6: pwm@d401b800 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd401b800 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM6>;
resets = <&syscon_apbc RESET_PWM6>;
status = "disabled";
};

pwm7: pwm@d401bc00 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd401bc00 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM7>;
resets = <&syscon_apbc RESET_PWM7>;
status = "disabled";
};

pwm8: pwm@d4020000 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4020000 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM8>;
resets = <&syscon_apbc RESET_PWM8>;
status = "disabled";
};

pwm9: pwm@d4020400 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4020400 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM9>;
resets = <&syscon_apbc RESET_PWM9>;
status = "disabled";
};

pwm10: pwm@d4020800 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4020800 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM10>;
resets = <&syscon_apbc RESET_PWM10>;
status = "disabled";
};

pwm11: pwm@d4020c00 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4020c00 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM11>;
resets = <&syscon_apbc RESET_PWM11>;
status = "disabled";
};

pwm12: pwm@d4021000 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4021000 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM12>;
resets = <&syscon_apbc RESET_PWM12>;
status = "disabled";
};

pwm13: pwm@d4021400 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4021400 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM13>;
resets = <&syscon_apbc RESET_PWM13>;
status = "disabled";
};

pwm14: pwm@d4021800 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4021800 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM14>;
resets = <&syscon_apbc RESET_PWM14>;
status = "disabled";
};

pwm15: pwm@d4021c00 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4021c00 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM15>;
resets = <&syscon_apbc RESET_PWM15>;
status = "disabled";
};

pwm16: pwm@d4022000 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4022000 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM16>;
resets = <&syscon_apbc RESET_PWM16>;
status = "disabled";
};

pwm17: pwm@d4022400 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4022400 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM17>;
resets = <&syscon_apbc RESET_PWM17>;
status = "disabled";
};

pwm18: pwm@d4022800 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4022800 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM18>;
resets = <&syscon_apbc RESET_PWM18>;
status = "disabled";
};

pwm19: pwm@d4022c00 {
compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
reg = <0x0 0xd4022c00 0x0 0x10>;
#pwm-cells = <1>;
clocks = <&syscon_apbc CLK_PWM19>;
resets = <&syscon_apbc RESET_PWM19>;
status = "disabled";
};
};
};
2 changes: 2 additions & 0 deletions arch/riscv/configs/defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -257,6 +257,8 @@ CONFIG_RPMSG_CTRL=y
CONFIG_RPMSG_VIRTIO=y
CONFIG_PM_DEVFREQ=y
CONFIG_IIO=y
CONFIG_PWM=y
CONFIG_PWM_PXA=m
CONFIG_THEAD_C900_ACLINT_SSWI=y
CONFIG_PHY_SUN4I_USB=m
CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m
Expand Down
2 changes: 1 addition & 1 deletion drivers/pwm/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -493,7 +493,7 @@ config PWM_PCA9685

config PWM_PXA
tristate "PXA PWM support"
depends on ARCH_PXA || ARCH_MMP || COMPILE_TEST
depends on ARCH_PXA || ARCH_MMP || ARCH_SPACEMIT || COMPILE_TEST
depends on HAS_IOMEM
help
Generic PWM framework driver for PXA.
Expand Down
14 changes: 10 additions & 4 deletions drivers/pwm/pwm-pxa.c
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@
#include <linux/io.h>
#include <linux/pwm.h>
#include <linux/of.h>
#include <linux/reset.h>

#include <asm/div64.h>

Expand All @@ -49,10 +50,10 @@ MODULE_DEVICE_TABLE(platform, pwm_id_table);
#define PWMDCR_FD (1 << 10)

struct pxa_pwm_chip {
struct device *dev;

struct clk *clk;
void __iomem *mmio_base;
struct device *dev;
struct clk *clk;
void __iomem *mmio_base;
struct reset_control *reset;
};

static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
Expand Down Expand Up @@ -179,6 +180,11 @@ static int pwm_probe(struct platform_device *pdev)
if (IS_ERR(pc->clk))
return PTR_ERR(pc->clk);

pc->reset = devm_reset_control_get_optional_exclusive_deasserted(
&pdev->dev, NULL);
if (IS_ERR(pc->reset))
return PTR_ERR(pc->reset);

chip->ops = &pxa_pwm_ops;

if (IS_ENABLED(CONFIG_OF))
Expand Down
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