[PW_SID:955381] riscv: Add Zicbop & prefetchw support#322
[PW_SID:955381] riscv: Add Zicbop & prefetchw support#322linux-riscv-bot wants to merge 5 commits into
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The S-type instructions are first introduced and then used to define the encoding of the Zicbop prefetching instructions. Co-developed-by: Guo Ren <guoren@kernel.org> Signed-off-by: Guo Ren <guoren@kernel.org> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Zicbop introduces cache blocks prefetching instructions, add the necessary support for the kernel to use it in the coming commits. Co-developed-by: Guo Ren <guoren@kernel.org> Signed-off-by: Guo Ren <guoren@kernel.org> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Enable Linux prefetch and prefetchw primitives using Zicbop. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@kernel.org> Link: https://lore.kernel.org/r/20231231082955.16516-3-guoren@kernel.org Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The cost of changing a cacheline from shared to exclusive state can be significant, especially when this is triggered by an exclusive store, since it may result in having to retry the transaction. This patch makes use of prefetch.w to prefetch cachelines for write prior to lr/sc loops when using the xchg_small atomic routine. This patch is inspired by commit 0ea366f ("arm64: atomics: prefetch the destination word for write prior to stxr"). Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@kernel.org> Link: https://lore.kernel.org/r/20231231082955.16516-4-guoren@kernel.org Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 1: "[v3,1/4] riscv: Introduce Zicbop instructions" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 2: "[v3,2/4] riscv: Add support for Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 3: "[v3,3/4] riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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Patch 4: "[v3,4/4] riscv: xchg: Prefetch the destination word for sc.w" |
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PR for series 955381 applied to workflow__riscv__fixes
Name: riscv: Add Zicbop & prefetchw support
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=955381
Version: 3