[PW_SID:963449] riscv: Add vendor extensions support for SiFive#421
[PW_SID:963449] riscv: Add vendor extensions support for SiFive#421linux-riscv-bot wants to merge 12 commits into
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…escription Add "xsfvqmaccdod" and "xsfvqmaccqoq" ISA extensions which are provided by SiFive for int8 matrix multiplication instructions support. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add SiFive vendor extension support to the kernel with the target of "xsfvqmaccdod" and "xsfvqmaccqoq". Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
…extensions Document the support for sifive vendor extensions using the key RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0 and two vendor extensions for SiFive Int8 Matrix Multiplication Instructions using RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCDOD and RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCQOQ. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
…qmaccdod and xsfqmaccqoq Add a new hwprobe key "RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0" which allows userspace to probe for the new vendor extensions from SiFive. Also, add new hwprobe for SiFive "xsfvqmaccdod" and "xsfvqmaccqoq" vendor extensions. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add "xsfvfnrclipxfqf" ISA extension which is provided by SiFive for FP32-to-int8 ranged clip instructions support. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add SiFive vendor extension "xsfvfnrclipxfqf" support to the kernel. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Document the support for SiFive vendor extensions for FP32-to-int8 Ranged Clip Instructions using RISCV_HWPROBE_VENDOR_EXT_XSFVFNRCLIPXFQF. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add hwprobe for SiFive "xsfvfnrclipxfqf" vendor extension. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add "xsfvfwmaccqqq" ISA extension which is provided by SiFive for matrix multiply accumulate instructions support. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add SiFive vendor extension "xsfvfwmaccqqq" support to the kernel. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Document the support for matrix multiply accumulate instruction from SiFive using RISCV_HWPROBE_VENDOR_EXT_XSFVFWMACCQQQ. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add hwprobe for SiFive "xsfvfwmaccqqq" vendor extension. Signed-off-by: Cyan Yang <cyan.yang@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 1: "[v2,01/12] dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description" |
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Patch 2: "[v2,02/12] riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions" |
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Patch 2: "[v2,02/12] riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions" |
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Patch 2: "[v2,02/12] riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions" |
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Patch 2: "[v2,02/12] riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions" |
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Patch 2: "[v2,02/12] riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions" |
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Patch 2: "[v2,02/12] riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions" |
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Patch 10: "[v2,10/12] riscv: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 10: "[v2,10/12] riscv: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 10: "[v2,10/12] riscv: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 10: "[v2,10/12] riscv: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 11: "[v2,11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
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Patch 12: "[v2,12/12] riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension" |
PR for series 963449 applied to workflow__riscv__fixes
Name: riscv: Add vendor extensions support for SiFive
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=963449
Version: 2