Alex for next sbi 3.0 rebase 6.15 rc6 manual#462

Closed

AlexGhiti wants to merge 70 commits into

6.16_PRs/masterfrom

alex-for-next-sbi-3.0-rebase-6.15-rc6_manual

Commits on May 14, 2025

riscv/kexec_file: Fix comment in purgatory relocator

ziyao233
authored and
Alexandre Ghiti
committed
riscv: Add support for PUD THP
Alexandre Ghiti
committed
riscv: save the SR_SUM status over switches

bjdooks-ct
authored and
Alexandre Ghiti
committed
riscv: implement user_access_begin() and families

xhackerustc
authored and
Alexandre Ghiti
committed
riscv: uaccess: use input constraints for ptr of __put_user()

xhackerustc
authored and
Alexandre Ghiti
committed
riscv: uaccess: use 'asm goto' for put_user()

xhackerustc
authored and
Alexandre Ghiti
committed
riscv: uaccess: use 'asm_goto_output' for get_user()

xhackerustc
authored and
Alexandre Ghiti
committed
riscv: ftrace: support fastcc in Clang for WITH_ARGS

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: ftrace factor out code defined by !WITH_ARG

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: ftrace: align patchable functions to 4 Byte boundary

AndybnACT
authored and
Alexandre Ghiti
committed
kernel: ftrace: export ftrace_sync_ipi

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: ftrace: prepare ftrace for atomic code patching

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: ftrace: do not use stop_machine to update code

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: vector: Support calling schedule() for preemptible Vector

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: add a data fence for CMODX in the kernel mode

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: ftrace: support PREEMPT

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS

puranjaymohan
authored and
Alexandre Ghiti
committed
riscv: ftrace: support direct call using call_ops

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: Documentation: add a description about dynamic ftrace

AndybnACT
authored and
Alexandre Ghiti
committed
riscv: module: Optimize PLT/GOT entry counting

SiFiveHolland
authored and
Alexandre Ghiti
committed
RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND

Red54
authored and
Alexandre Ghiti
committed
riscv: kexec_file: Split the loading of kernel and others

Song Shuai
authored and
Alexandre Ghiti
committed
riscv: kexec_file: Support loading Image binary file

Song Shuai
authored and
Alexandre Ghiti
committed
perf symbols: Ignore mapping symbols on riscv

xiaobo55x
authored and
Alexandre Ghiti
committed
riscv: Make regs_irqs_disabled() more clear

seehearfeel
authored and
Alexandre Ghiti
committed
riscv: hwprobe: export Zabha extension
Alexandre Ghiti
committed
riscv: Introduce Zicbop instructions
Alexandre Ghiti
committed
riscv: Add support for Zicbop
Alexandre Ghiti
committed
riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop

guoren83
authored and
Alexandre Ghiti
committed
riscv: xchg: Prefetch the destination word for sc.w

guoren83
authored and
Alexandre Ghiti
committed
MAINTAINERS: Update Atish's email address

atishp04
authored and
Alexandre Ghiti
committed
riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE

mssola
authored and
Alexandre Ghiti
committed

Commits on May 16, 2025

riscv: Fix typo EXRACT -> EXTRACT
Alexandre Ghiti
committed

Commits on May 21, 2025

riscv: Strengthen duplicate and inconsistent definition of RV_X()
Alexandre Ghiti
committed
riscv: Move all duplicate insn parsing macros into asm/insn.h
Alexandre Ghiti
committed
Merge patch series "Move duplicated instructions macros into asm/insn.h"
Alexandre Ghiti
committed
riscv: kprobes: Move branch_rs2_idx to insn.h

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Move branch_funct3 to insn.h

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_JTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_RS1_REG

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_BTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kproves: Remove duplication of RVC_EXTRACT_JTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RVC_EXTRACT_C2_RS1_REG

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RVC_EXTRACT_BTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_RD_REG

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_UTYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
riscv: kprobes: Remove duplication of RV_EXTRACT_ITYPE_IMM

covanam
authored and
Alexandre Ghiti
committed
Merge patch series "riscv: kprobes: Clean up instruction simulation"
Alexandre Ghiti
committed
riscv: Add kprobes KUnit test

covanam
authored and
Alexandre Ghiti
committed
riscv: mm: Add support for Svinval extension

mdchitale
authored and
Alexandre Ghiti
committed
raid6: Add RISC-V SIMD syndrome and recovery calculations

Chunyan Zhang
authored and
Alexandre Ghiti
committed

Commits on May 23, 2025

riscv: enable mseal sysmap for RV64

xhackerustc
authored and
Alexandre Ghiti
committed
RISC-V: vDSO: Wire up getrandom() vDSO implementation

xry111
authored and
Alexandre Ghiti
committed

Commits on May 25, 2025

riscv: sbi: add Firmware Feature (FWFT) SBI extensions definitions

clementleger
authored and
Alexandre Ghiti
committed
riscv: sbi: remove useless parenthesis

clementleger
authored and
Alexandre Ghiti
committed
riscv: sbi: add new SBI error mappings

clementleger
authored and
Alexandre Ghiti
committed
riscv: sbi: add FWFT extension interface

clementleger
authored and
Alexandre Ghiti
committed
riscv: sbi: add SBI FWFT extension calls

clementleger
authored and
Alexandre Ghiti
committed
riscv: misaligned: request misaligned exception from SBI

clementleger
authored and
Alexandre Ghiti
committed
riscv: misaligned: use on_each_cpu() for scalar misaligned access probing

clementleger
authored and
Alexandre Ghiti
committed
riscv: misaligned: declare misaligned_access_speed under CONFIG_RISCV_MISALIGNED

clementleger
authored and
Alexandre Ghiti
committed
riscv: misaligned: move emulated access uniformity check in a function

clementleger
authored and
Alexandre Ghiti
committed
riscv: misaligned: add a function to check misalign trap delegability

clementleger
authored and
Alexandre Ghiti
committed
Merge patch series "riscv: add SBI FWFT misaligned exception delegation support"
Alexandre Ghiti
committed
selftests: riscv: add misaligned access testing

clementleger
authored and
Alexandre Ghiti
committed

Commits on Jun 4, 2025

riscv: make unsafe user copy routines use existing assembly routines
Alexandre Ghiti
committed
riscv: process: use unsigned int instead of unsigned long for put_user()

clementleger
authored and
Alexandre Ghiti
committed
riscv: uaccess: do not do misaligned accesses in get/put_user()

clementleger
authored and
Alexandre Ghiti
committed
Merge patch series "riscv: misaligned: fix misaligned accesses handling in put/get_user()"
Alexandre Ghiti
committed
Adding CI files
Alexandre Ghiti
committed