[PW_SID:967948] [v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit

[linux-riscv-bot]

PR for series 967948 applied to workflow__riscv__for-next

Name: [v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=967948
Version: 2

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 632.86 seconds
Result: ERROR
Output:

Redirect to /build/tmp.jn9V0ipj80 and /build/tmp.XvHHlkNw1v
Tree base:
cf099833ed4da ("Adding CI files")
Building the whole tree with the patch
error:
ld.lld: error: version script assignment of 'LINUX_4.15' to symbol '__vdso_getrandom' failed: symbol not defined
llvm-nm: error: arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg: No such file or directory
/build/tmp0s5u8xvg/arch/riscv/kernel/compat_signal.c:220:28: error: use of undeclared identifier 'compat__vdso_rt_sigreturn_offset'
ld.lld: error: version script assignment of 'LINUX_4.15' to symbol '__vdso_getrandom' failed: symbol not defined
llvm-objcopy: error: 'arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg': No such file or directory



real	10m26.945s
user	403m49.517s
sys	74m44.535s

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 2420.32 seconds
Result: PASS

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.88 seconds
Result: PASS

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.86 seconds
Result: PASS

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 1.97 seconds
Result: WARNING
Output:

WARNING: Unknown commit id '788aa64c0c01', maybe rebased or not pulled?
#10: 
Fixes: 788aa64c0c01 ("riscv: save the SR_SUM status over switches")

CHECK: Alignment should match open parenthesis
#55: FILE: arch/riscv/kernel/asm-offsets.c:351:
+	DEFINE(TASK_THREAD_SUM_RA,
+		  offsetof(struct task_struct, thread.sum)

total: 0 errors, 1 warnings, 1 checks, 45 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit acaaf35b87c7 ("riscv: uaccess: Only restore the CSR_STATUS SUM bit") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 1 warnings, 1 checks, 45 lines checked
CHECK: Alignment should match open parenthesis
WARNING: Unknown commit id '788aa64c0c01', maybe rebased or not pulled?

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 65.91 seconds
Result: PASS

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.23 seconds
Result: PASS

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
kdoc
Desc: Detects for kdoc errors
Duration: 0.85 seconds
Result: PASS

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
module-param
Desc: Detect module_param changes
Duration: 0.25 seconds
Result: PASS

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 1.15 seconds
Result: ERROR
Output:

Commit: acaaf35b87c7d ("riscv: uaccess: Only restore the CSR_STATUS SUM bit")
	Fixes tag: Fixes: 788aa64c0c01 ("riscv: save the SR_SUM status over switches")
	Has these problem(s):
		- Target SHA1 does not exist
Problems with Fixes tag: 1

[linux-riscv-bot]

Patch 1: "[v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.29 seconds
Result: PASS