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[PW_SID:969203] [v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper#479

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[PW_SID:969203] [v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper#479
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@linux-riscv-bot linux-riscv-bot commented Jun 6, 2025

PR for series 969203 applied to workflow__riscv__for-next

Name: [v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=969203
Version: 2

Linux RISC-V bot and others added 2 commits June 5, 2025 21:18
Adding CI files
e678629
@xry111
RISC-V: vDSO: Correct inline assembly constraints in the getrandom sy…
b5bc71e 
…scall wrapper

As recently pointed out by Thomas, if a register is forced for two
different register variables, among them one is used as "+" (both input
and output) and another is only used as input, Clang would treat the
conflicting input parameters as undefined behaviour and optimize away
the argument assignment.

Per an example in the GCC documentation, for this purpose we can use "="
(only output) for the output, and "0" for the input for that we must
reuse the same register as the output.  And GCC developers have
confirmed using a simple "r" (that we use for most vDSO implementations)
instead of "0" is also fine.

Link: https://lore.kernel.org/all/20250603-loongarch-vdso-syscall-v1-1-6d12d6dfbdd0@linutronix.de/
Link: https://gcc.gnu.org/onlinedocs/gcc-15.1.0/gcc/Local-Register-Variables.html
Link: https://gcc.gnu.org/pipermail/gcc-help/2025-June/144266.html
Cc: Thomas Weißschuh <thomas.weissschuh@linutronix.de>
Cc: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Xi Ruoyao <xry111@xry111.site>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 104.17 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1021.81 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1482.55 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.91 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.72 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.72 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 67.26 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.24 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
kdoc
Desc: Detects for kdoc errors
Duration: 0.93 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
module-param
Desc: Detect module_param changes
Duration: 0.24 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.22 seconds
Result: PASS

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linux-riscv-bot commented Jun 6, 2025

Patch 1: "[v2] RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.30 seconds
Result: PASS

@linux-riscv-bot linux-riscv-bot force-pushed the workflow__riscv__for-next branch from e678629 to 7991a94 Compare June 10, 2025 15:47
@linux-riscv-bot linux-riscv-bot deleted the pw969203 branch June 12, 2025 20:21
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