[PW_SID:970665] Linux SBI MPXY and RPMI drivers#513
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Add device tree bindings for the common RISC-V Platform Management Interface (RPMI) shared memory transport as a mailbox controller. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add device tree bindings for the RISC-V SBI Message Proxy (MPXY) extension as a mailbox controller. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add defines for the new SBI message proxy extension which is part of the SBI v3.0 specification. Co-developed-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The RPMI based mailbox controller drivers and mailbox clients need to share defines related to RPMI messages over mailbox interface so add a common header for this purpose. Co-developed-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Introduce optional fw_node() callback which allows a mailbox controller driver to provide controller specific mapping using fwnode. The Linux OF framework already implements fwnode operations for the Linux DD framework so the fw_xlate() callback works fine with device tree as well. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add a mailbox controller driver for the new SBI message proxy extension which is part of the SBI v3.0 specification. Co-developed-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add device tree bindings for the RPMI clock service group based message proxy implemented by the SBI implementation (machine mode firmware or hypervisor). The RPMI clock service group is defined by the RISC-V platform management interface (RPMI) specification. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add device tree bindings for the RPMI clock service group based controller for the supervisor software. The RPMI clock service group is defined by the RISC-V platform management interface (RPMI) specification. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The RPMI specification defines a clock service group which can be accessed via SBI MPXY extension or dedicated S-mode RPMI transport. Add mailbox client based clock driver for the RISC-V RPMI clock service group. Co-developed-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add device tree bindings for the RPMI system MSI service group based message proxy implemented by the SBI implementation (machine mode firmware or hypervisor). The RPMI system MSI service group is defined by the RISC-V platform management interface (RPMI) specification. Reviewed-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add device tree bindings for the RPMI system MSI service group based interrupt controller for the supervisor software. The RPMI system MSI service group is defined by the RISC-V platform management interface (RPMI) specification. Reviewed-by: Atish Patra <atishp@rivosinc.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The RPMI specification defines a system MSI service group which allows application processors to receive MSIs upon system events such as graceful shutdown/reboot request, CPU hotplug event, memory hotplug event, etc. Add an irqchip driver for the RISC-V RPMI system MSI service group to directly receive system MSIs in Linux kernel. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Currently acpi_fwnode_get_reference_args() calls the public function __acpi_node_get_property_reference() which ignores the nargs_prop parameter. To fix this, make __acpi_node_get_property_reference() to call the static acpi_fwnode_get_reference() so that callers of fwnode_get_reference_args() can still pass a valid property name to fetch the number of arguments. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Currently, ACPI doesn't support cells property when fwnode_property_get_reference_args() is called. ACPI always expects the number of arguments to be passed. However, the above mentioned call being a common interface for OF and ACPI, it is better to have single calling convention which works for both. Hence, add support for cells property on the reference device to get the number of arguments dynamically. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The RPMI System MSI interrupt controller (just like PLIC and APLIC) needs to probed prior to devices like GED which use interrupts provided by it. Also, it has dependency on the SBI MPXY mailbox device. Add HIDs of RPMI System MSI and SBI MPXY mailbox devices to the honor list so that those dependencies are handled. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Currently, the interrupt controller list is created without any order. Create the list sorted with the GSI base of the interrupt controllers. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Some RISC-V interrupt controllers like RPMI based system MSI interrupt controllers do not have MADT entry defined. These interrupt controllers exist only in the namespace. ACPI spec defines _GSB method to get the GSI base of the interrupt controller, However, there is no such standard method to get the GSI range. To support such interrupt controllers, set the GSI range of such interrupt controllers to non-overlapping range and provide API for interrupt controller driver to update it with proper value. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The RPMI System MSI device will provide GSIs to downstream devices (such as GED) so add it to the RISC-V GSI to fwnode mapping. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
ACPI based loadable drivers which need MSIs will also need imsic_acpi_get_fwnode() to update the device MSI domain so export this function. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add ACPI support for the RISC-V SBI message proxy (MPXY) based mailbox driver. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add ACPI support for the RISC-V RPMI system MSI based irqchip driver. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The GPIO keyboard and event device can be used to receive graceful shutdown or reboot input keys so let us enable it by default for RV64 (just like ARM64). Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add Rahul and myself as maintainers for RISC-V RPMI and MPXY drivers. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v5,01/23] dt-bindings: mailbox: Add bindings for RPMI shared memory transport" |
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Patch 1: "[v5,01/23] dt-bindings: mailbox: Add bindings for RPMI shared memory transport" |
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Patch 1: "[v5,01/23] dt-bindings: mailbox: Add bindings for RPMI shared memory transport" |
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Patch 1: "[v5,01/23] dt-bindings: mailbox: Add bindings for RPMI shared memory transport" |
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Patch 1: "[v5,01/23] dt-bindings: mailbox: Add bindings for RPMI shared memory transport" |
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Patch 1: "[v5,01/23] dt-bindings: mailbox: Add bindings for RPMI shared memory transport" |
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Patch 21: "[v5,21/23] irqchip/riscv-rpmi-sysmsi: Add ACPI support" |
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Patch 21: "[v5,21/23] irqchip/riscv-rpmi-sysmsi: Add ACPI support" |
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Patch 21: "[v5,21/23] irqchip/riscv-rpmi-sysmsi: Add ACPI support" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 22: "[v5,22/23] RISC-V: Enable GPIO keyboard and event device in RV64 defconfig" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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Patch 23: "[v5,23/23] MAINTAINERS: Add entry for RISC-V RPMI and MPXY drivers" |
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PR for series 970665 applied to workflow__riscv__fixes
Name: Linux SBI MPXY and RPMI drivers
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=970665
Version: 5