Skip to content

[PW_SID:971514] MIPS P8700 variant of the ACLINT IPI controller#520

Closed
linux-riscv-bot wants to merge 7 commits into
workflow__riscv__fixesfrom
pw971514
Closed

[PW_SID:971514] MIPS P8700 variant of the ACLINT IPI controller#520
linux-riscv-bot wants to merge 7 commits into
workflow__riscv__fixesfrom
pw971514

Conversation

@linux-riscv-bot
Copy link
Copy Markdown

PR for series 971514 applied to workflow__riscv__fixes

Name: MIPS P8700 variant of the ACLINT IPI controller
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=971514
Version: 3

RISC-V APLIC specification defines "hart index" in [1]
And similar definitions found for ACLINT in [2]

Quote from [1]:

Within a given interrupt domain, each of the domain’s harts has a unique
index number in the range 0 to 2^14 − 1 (= 16,383). The index number a
domain associates with a hart may or may not have any relationship to the
unique hart identifier (“hart ID”) that the RISC-V Privileged
Architecture assigns to the hart. Two different interrupt domains may
employ entirely different index numbers for the same set of harts.

Further, [1] says in "4.5 Memory-mapped control region for an
interrupt domain":

The array of IDC structures may include some for potential hart index
numbers that are not actual hart index numbers in the domain.
For example, the first IDC structure is always for hart index 0, but 0 is
not necessarily a valid index number for any hart in the domain.

Support arbitrary hart indices specified in an optional property
"riscv,hart-indexes" which is specified as an array of u32 elements, one
per interrupt target, listing hart indexes in the same order as in
"interrupts-extended". If this property is not specified, fallback to use
logical hart indices within the domain.

If property not exist, fall back to logical hart indexes

Link: https://github.com/riscv/riscv-aia [1]
Link: https://github.com/riscvarchive/riscv-aclint [2]
Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Use global helper function instead of the local
implementation

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add ACLINT-SSWI variant for the MIPS P8700. This CPU has
SSWI device compliant with the RISC-V draft spec (see [1])
CPU indexes on this platform are not contiguous, instead
it uses bit-fields to encode hart,core,cluster numbers, thus
property "riscv,hart-indexes" is mandatory

Link: https://github.com/riscvarchive/riscv-aclint [1]

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Refactor Thead specific implementation of the ACLINT-SSWI irqchip.
Factor out generic code that serves both Thead and MIPS variants.
This generic part is according to the RISC-V draft spec [1].

Link: https://github.com/riscvarchive/riscv-aclint [1]

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Resolve hart index according to assignment in the
"riscv,hart-indexes" property as defined in [1]

Link: https://github.com/riscvarchive/riscv-aclint [1]
Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Move variables to the innermost scope where it is used

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 102.76 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1674.91 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 2365.66 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.63 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 22.08 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.97 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 72.54 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.25 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
kdoc
Desc: Detects for kdoc errors
Duration: 0.92 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
module-param
Desc: Detect module_param changes
Duration: 0.26 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 1: "[v3,1/7] riscv: helper to parse hart index"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.31 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 102.43 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1006.59 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1491.08 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.74 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.58 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.74 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 71.12 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.24 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
kdoc
Desc: Detects for kdoc errors
Duration: 0.87 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
module-param
Desc: Detect module_param changes
Duration: 0.25 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 2: "[v3,2/7] irqchip/riscv-aplic: use riscv_get_hart_index()"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 5: "[v3,5/7] irqchip/aslint-sswi: resolve hart index"
kdoc
Desc: Detects for kdoc errors
Duration: 0.90 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 5: "[v3,5/7] irqchip/aslint-sswi: resolve hart index"
module-param
Desc: Detect module_param changes
Duration: 0.26 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 5: "[v3,5/7] irqchip/aslint-sswi: resolve hart index"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 5: "[v3,5/7] irqchip/aslint-sswi: resolve hart index"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.31 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 102.65 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1002.94 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1484.61 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 21.14 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.96 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.74 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 71.61 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
kdoc
Desc: Detects for kdoc errors
Duration: 0.79 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
module-param
Desc: Detect module_param changes
Duration: 0.26 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 6: "[v3,6/7] irqchip/aclint-sswi: reduce data scope"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.31 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 101.99 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1007.81 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1495.00 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 20.80 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.80 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 1.40 seconds
Result: WARNING
Output:

WARNING: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 15 lines checked

NOTE: For some of the reported defects, checkpatch may be able to
      mechanically convert to the typical style using --fix or --fix-inplace.

Commit 857f38b1921e ("irqchip/aclint-sswi: remove extra includes") has style problems, please review.

NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF

NOTE: If any of the errors are false positives, please report
      them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 1 warnings, 0 checks, 15 lines checked
WARNING: Missing commit description - Add an appropriate one


@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 71.28 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.25 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
kdoc
Desc: Detects for kdoc errors
Duration: 0.91 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
module-param
Desc: Detect module_param changes
Duration: 0.26 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.24 seconds
Result: PASS

@linux-riscv-bot
Copy link
Copy Markdown
Author

Patch 7: "[v3,7/7] irqchip/aclint-sswi: remove extra includes"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.32 seconds
Result: PASS

@linux-riscv-bot linux-riscv-bot deleted the pw971514 branch June 19, 2025 16:22
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants