Date

LICENSE

@@ -1,6 +1,6 @@
 MIT License
 
-Copyright (c) 2022 潘鸿洋
+Copyright (c) 2025
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal

README.md

@@ -1,17 +1,15 @@
-# powerful heightened yielded Logic Synthesis (phyLS)
+# PhyMap: A Physically-Aware Incremental Mapping Framework with On-the-fly Post-Layout Critical Path Tracking
 
-phyLS is based on the [mockturtle](https://github.com/lsils/mockturtle) and the [abc](https://github.com/berkeley-abc/abc), it can optimize different logics attributes. 
+PhyMap is based on the [mockturtle](https://github.com/lsils/mockturtle) and the [abc](https://github.com/berkeley-abc/abc), it can optimize different logics attributes. 
 Currently, it supports mockturtle format(AIG, MIG, XAG, XMG) and abc format(AIG,GIA) based optimization.
 
-[Read the documentation here.](https://phyls.readthedocs.io/en/latest/)
-
 ## Requirements
 A modern compiler is required to build the libraries. 
 Compiled successfully with Clang 6.0.1, Clang 12.0.0, GCC 7.3.0, and GCC 8.2.0. 
 
 ## How to Compile
 ```bash
-git clone --recursive https://github.com/panhomyoung/phyLS.git
+git clone --recursive https://anonymous.4open.science/r/PhyMap
 cd phyLS
 mkdir build
 cd build

src/commands/abc/&fraig.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs combinational SAT sweeping
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/03/14
  */
 

src/commands/abc/&get.hpp

@@ -6,7 +6,7 @@
  *
  * @brief converts the current network into GIA
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/03/14
  */
 

src/commands/abc/&if.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs FPGA mapping of the GIA
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/&nf.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs technology-independent mapping of the GIA
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/amap.hpp

@@ -5,7 +5,7 @@
  *
  * @brief performs technology-independent mapping of the AIG
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/balance.hpp

@@ -5,7 +5,7 @@
  *
  * @brief transforms the current network into a well-balanced AIG
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/cec.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs combinational equivalence checking
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/abc/comb.hpp

@@ -6,7 +6,7 @@
  *
  * @brief converts comb network into seq, and vice versa
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/03/21
  */
 

src/commands/abc/compress2rs.hpp

@@ -5,7 +5,7 @@
  *
  * @brief combination optimization script
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/dc2.hpp

@@ -5,7 +5,7 @@
  *
  * @brief combination optimization script
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/fraig.hpp

@@ -6,7 +6,7 @@
  *
  * @brief transforms a logic network into a functionally reduced AIG
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/03/14
  */
 

src/commands/abc/if.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs FPGA technology mapping of the network
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/08/03
  */
 

src/commands/abc/map.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs technology-independent mapping of the AIG
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/put.hpp

@@ -5,7 +5,7 @@
  *
  * @brief converts the current GIA network into Ntk
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/read.hpp

@@ -6,7 +6,7 @@
  *
  * @brief  replaces the current network by the network read from file
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/03/14
  */
 

src/commands/abc/read_genlib.hpp

@@ -6,7 +6,7 @@
  *
  * @brief read the library from a genlib file
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/refactor.hpp

@@ -5,7 +5,7 @@
  *
  * @brief performs technology-independent refactoring of the AIG
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/resub.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs technology-independent restructuring of the AIG
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/02/28
  */
 

src/commands/abc/resyn2rs.hpp

@@ -5,7 +5,7 @@
  *
  * @brief combination optimization script
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/rewrite.hpp

@@ -5,7 +5,7 @@
  *
  * @brief performs technology-independent rewriting of the AIG
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/sop.hpp

@@ -5,7 +5,7 @@
  *
  * @brief converts node functions to SOP
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/abc/strash.hpp

@@ -6,7 +6,7 @@
  *
  * @brief transforms combinational logic into an AIG
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/03/01
  */
 

src/commands/abc/write.hpp

@@ -6,7 +6,7 @@
  *
  * @brief  writes the current network into file
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/03/14
  */
 

src/commands/algebraic_rewriting.hpp

@@ -6,7 +6,7 @@
  *
  * @brief algebraic depth rewriting
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/balance.hpp

@@ -6,7 +6,7 @@
  *
  * @brief transforms the current network into a well-balanced AIG
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/cec.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs combinational equivalence checking
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/convert_graph.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs decomposable function for resynthesis graph
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/20
  */
 

src/commands/cut_rewriting.hpp

@@ -6,7 +6,7 @@
  *
  * @brief on-the-fly DAG-aware logic rewriting
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/15
  */
 

src/commands/exact/exact_lut.hpp

@@ -6,7 +6,7 @@
  *
  * @brief STP based exact synthesis
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/11/23
  */
 

src/commands/exact/lutrw.hpp

@@ -6,7 +6,7 @@
  *
  * @brief 2-lut rewriting with STP based exact synthesis
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/11/30
  */
 

src/commands/exprsim.hpp

@@ -6,7 +6,7 @@
  *
  * @brief simulate a expression and return a truth table
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/functional_reduction.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs functional reduction
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/20
  */
 

src/commands/load.hpp

@@ -28,7 +28,7 @@
  *
  * @brief load a hexdecimal string represented truth table
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/lut_mapping.hpp

@@ -6,7 +6,7 @@
  *
  * @brief lut mapping for any input
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/lutmap.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs FPGA technology mapping of the network
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/21
  */
 

src/commands/node_resynthesis.hpp

@@ -6,7 +6,7 @@
  *
  * @brief Node resynthesis
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/ps2.hpp

@@ -6,7 +6,7 @@
  *
  * @brief Show statistics in the stored network
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/11/16
  */
 

src/commands/refactor.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs technology-independent refactoring
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/resub.hpp

@@ -6,7 +6,7 @@
  *
  * @brief performs technology-independent restructuring
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/sim.hpp

@@ -6,7 +6,7 @@
  *
  * @brief logic network simulation
  *
- * @author Homyoung
+ * @author XXX
  * @since  2022/12/14
  */
 

src/commands/simulator.hpp

@@ -6,7 +6,7 @@
  *
  * @brief Semi-tensor product based logic network simulation
  *
- * @author Homyoung
+ * @author XXX
  * @since  2023/03/21
  */