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| if (SSCLIC) begin | ||
| reg_all_int_req.addr = reg_req_i.addr - SCLICINT_START; | ||
| if (intmode[reg_all_int_req.addr[15:2]] <= S_MODE) begin | ||
| addr_tmp = reg_req_i.addr[ADDR_W-1:0] - SCLICINT_START; |
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Do you remember why you had to introduce addr_tmp? Sim bug?
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Not sure anymore unfortunately. Looking at the code it could be also simply for readability, but I am open to comments on that.
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@bluewww @alex96295 I found a new problem when synthesizing this version of the CLIC with a different synthesis compiler. It seems that the problem is related to the parametric defines, which are not seen as constants in the evaluation of the I pushed a fix which is not really elegant but seems to work for all synthesis tools tried and does not require unrolling the entire for loop, which would be way worse. Ideally I think we could move some of the localparams in |
| return (dividend + divisor - 1) / divisor; | ||
| endfunction | ||
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| function automatic int unsigned rounddown(int unsigned value, int unsigned alignment); |
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ideally better to add this to common cells if it is of general use, can be done later
I think for the time being we can leave it like this. I remember that Synopsys DC was able to digest the version you just modified (what was not able to digest was the original version with a case switch). For the sake of the projects depending on this IPs, I propose we merge this and we open an issue right now as a reminder to improve this logic. It can also be that meanwhile the tools that do not support this (Yosys?) will be improved as well |
Co-authored by: bluew <bluewww@users.noreply.github.com>
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Fixed history. Ready to merge. |
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