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feat(gust): adc-thin caller-supplied CR2-extra mask — unblock F1 internal channels (gale#216) - #218

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feat/adc-cr2-extra
Jul 23, 2026
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feat(gust): adc-thin caller-supplied CR2-extra mask — unblock F1 internal channels (gale#216)#218
avrabe merged 1 commit into
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feat/adc-cr2-extra

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@avrabe avrabe commented Jul 23, 2026

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What

Closes the driver half of gale#216. The dissolved thin-seam ADC driver wrote ADC_CR2 absolutely (ADON, ADON|SWSTART), dropping CR2.TSVREFE (bit 23) at the SWSTART instant — so it could not read an STM32F1 internal channel (Vrefint ch17 / temperature ch16), which need TSVREFE set during the conversion.

Fix: thread a caller-supplied cr2_extra: u32 into the three content-bearing CR2 writes, OR'd on top of the managed bits (which stay authoritative). Generic — also covers ALIGN / EXTTRIG / DMA. This unblocks the v0.5.0 D.2 silicon Vrefint anchor (firmware + flash follow in a separate hardware PR).

Changes

  • adc-thin/src/lib.rs: cr2_extra added as the last param of adc_configure / adc_enable / adc_start; wr(CR2, CR2_ADON [| SWSTART] | cr2_extra). adc_disable's CR2 = 0 teardown left untouched. Pure FSM (enable/begin/complete/read/disable, types, pack/unpack, config helpers) unchanged.
  • adc-thin-cm3.o: regenerated (synth 0.49.0 / loom 1.2.0), .text 740 → 772 B.
  • gust_adc_probe.rs + gust_adc.rs: extern decls + call sites updated to the new arity, passing 0 (behavior identical: ADON|0 == ADON).

Oracles (all re-verified by the coordinator)

  • Kani: 7/7 SUCCESSFUL — the pure FSM is unchanged, so the read-after-EOC / single-shot / phase-gating obligations are unaffected.
  • nm: all 8 adc_* exports present as T; only mmio_read32/mmio_write32 undefined (no new TCB).
  • qemu end-to-end: gust_adc_probe runs adc-probe ALL OK — proves the regenerated .o still drives the register sequence byte-identically at cr2_extra=0 (CR2=ADON|SWSTART=0x400001).
  • cargo build of both gated bins clean.

Kill-criterion

If cr2_extra=0 changed any register write vs. the prior .o, the probe's exact-value asserts would fail. They pass → behavior preserved; the new capability is purely additive.

🤖 Generated with Claude Code

…rnal channels (gale#216)

The dissolved ADC driver wrote CR2 absolutely (ADON, ADON|SWSTART), dropping
CR2.TSVREFE (bit 23) at the SWSTART instant. TSVREFE must stay set during the
conversion to read an F1 internal channel (Vrefint ch17 / temp ch16). Thread a
caller-supplied cr2_extra: u32 through adc_configure/adc_enable/adc_start,
OR'd into each content-bearing CR2 write; adc_disable's teardown write (CR2=0)
is unchanged. Regenerate adc-thin-cm3.o (synth 0.49.0/loom 1.2.0) and update
both callers (gust_adc.rs, gust_adc_probe.rs) to the new ABI, passing 0 to
preserve prior behavior.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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✅ All modified and coverable lines are covered by tests.

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@avrabe
avrabe merged commit 08c5a8e into main Jul 23, 2026
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@avrabe
avrabe deleted the feat/adc-cr2-extra branch July 23, 2026 13:58
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