fix(gust): adc-thin strict single-shot on F1 — SWSTART needs EXTTRIG+EXTSEL (gale#216) - #221
Merged
Conversation
…adc_configure (gale#216) adc_configure no longer writes CR2; ADON is set once by adc_enable and stays set, so a repeated ADON-write-while-on (which can trigger a spurious ch17 conversion on real STM32F1) is gone. adc_configure drops its now-unused cr2_extra param (dead once CR2 is untouched); the 3 callers (gust_adc, gust_adc_probe, gust_adc_silicon) drop the 4th arg. Regenerated adc-thin-cm3.o with synth 0.49.0 / loom 1.2.0 (.text 772 -> 740 bytes). Pure FSM + Kani harnesses untouched: cargo kani 7/7 SUCCESSFUL. qemu gust_adc_probe still reports "adc-probe ALL OK" (cr2_2 == CR2_ADON holds, now carried from adc_enable rather than re-written by configure). Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_011QG86sovTbfnPNY9SfhSmo
…le-shot confirmed on silicon (gale#216) Silicon caught that dropping adc_configure's CR2=ADON write (prev commit) HUNG the F100 read: a diagnostic showed SR.STRT=0 after adc_start — on F1 the SWSTART bit is ignored unless EXTTRIG(bit20)=1 + EXTSEL(bits19:17)=111 (SWSTART source) are set, which the driver never did. The old code only 'worked' because adc_configure's ADON-rewrite was the de-facto trigger (ADON-write-while-on restarts a conversion). Fix: adc_start now writes ADON|EXTTRIG|EXTSEL(SWSTART)|SWSTART (CR2=0x5E0001) so the software trigger actually fires — one conversion, true single-shot. Re-flashed F100: Vrefint=1645 raw, VDDA~2987mV, EOC cleared. Kani 7/7 (pure FSM untouched); qemu probe + Renode gust_adc gate updated to the new start CR2 value; .o regenerated (synth 0.49). Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Codecov Report✅ All modified and coverable lines are covered by tests. 📢 Thoughts on this report? Let us know! |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
What
Closes gale#216. Makes the dissolved adc-thin driver a strict single-shot on real STM32F1, and fixes a latent bug that silicon exposed along the way.
The story (silicon-driven)
gale#216 asked to remove the "double-ADON": the driver wrote
CR2=ADONin bothadc_enableandadc_configure, and on F1 anADON-write-while-ADON=1restarts a conversion, soadc_configurekicked an extra conversion.Dropping
adc_configure's CR2 write alone HUNG the F100 read (kill-criterion). A diagnostic build showed why: right afteradc_start,SR = 0x0— STRT=0, the conversion never started. On F1 theSWSTARTbit is ignored unlessEXTTRIG=1(bit 20) andEXTSEL=111(SWSTART source, bits 19:17) are also set — which the driver never did. The old code only ever worked becauseadc_configure's ADON-rewrite was the de-facto trigger;adc_start's SWSTART was decorative.Fix (two parts)
adc_configureno longer touches CR2 (drops the stray ADON-restart; CR2 staysADONfromadc_enable). Its now-unusedcr2_extraparam removed; the 3 callers updated.adc_startwritesADON | EXTTRIG | EXTSEL(SWSTART) | SWSTART | cr2_extra(CR2 = 0x5E0001) so the software trigger actually fires — exactly one conversion.Oracles (grounded)
Vrefint = 1645 raw, VDDA ≈ 2987 mV, EOC cleared=true— a true single conversion via one SWSTART (matches the earlier 1646, now clean).SR=0x0after start (STRT=0); post-fix STRT/EOC set, DR valid.adc-probe ALL OKwithadc-start ok: CR2=…=0x5e0001andadc-config ok: CR2=ADON(configure no longer writes it).gust_adcstart assertion updated to the new CR2 value..oregenerated on synth 0.49.0 (.text740 B, 0-SRAM).Kill-criterion
If the F100 read hangs or returns a raw outside the Vrefint band,
adc_startisn't triggering — the exact failure this fix resolves.🤖 Generated with Claude Code