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finding: synth#869 accepted for v0.52 — family is 8 not 6; trunc_sat already lowers so float->i64 needs no builtin - #173

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Jul 29, 2026
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finding: synth#869 accepted for v0.52 — family is 8 not 6; trunc_sat already lowers so float->i64 needs no builtin#173
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finding/synth869-accepted-v052

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@avrabe avrabe commented Jul 29, 2026

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synth accepted #869 for v0.52, with two corrections — both confirmed by a jess re-probe.

synth's corrections (both right)

  1. Completeness — the family is 8, not 6. i64.trunc_f64_s/_u also skip (synth#756 had recorded i64.trunc_f64 as a separate selector gap). My original list missed them.
  2. Soundness — the important catch. The trunc ops are more-total on ARM than in WASM: __aeabi_f2lz/f2ulz do not trap (they saturate or return garbage on NaN/out-of-range) while WASM requires a trap. A bare bl __aeabi_f2lz would be a silent miscompile — strictly worse than today's honest skip. synth will emit domain guards and execute the trap cases against wasmtime as part of the gate (the #709 guard shape; the class that bit #633/#666/#709/#665/#642).

jess finding that shrinks the job

Re-probing the full family turned up something useful: the four saturating variants already lower today (i64.trunc_sat_f32_s/u, i64.trunc_sat_f64_s/unm: T).

So the float→i64 half needs no builtin at all — the trapping variants are the existing, working trunc_sat lowering plus a trap guard. That also means synth never imports the more-total AEABI semantics it would then have to fence away. The job splits cleanly:

direction ops shape
i64 → float 4 convert genuinely needs AEABI (__aeabi_ul2f/l2f/ul2d/l2d)
float → i64 4 trunc reuse working trunc_sat + trap guard

Also supplied the exact trap vectors for the gate (NaN, ±inf, ≥2^63 / < -2^63 with -2^63 itself non-trapping; ≤ -1.0 and ≥ 2^64 for _u, with -0.0 and (-1,0)0), and committed jess to running any branch against the real fused falcon + per-stage components, reporting the skip delta by symbol name — a standing gate, not a one-off.

rivet validate → PASS.

🤖 Generated with Claude Code

…already lowers, so the float->i64 half needs no builtin

synth accepted #869 for v0.52 with two corrections, both confirmed by jess re-probe:
(a) COMPLETENESS: the family is EIGHT — i64.trunc_f64_s/_u also skip (synth#756 had it as a
    separate selector gap). Verified skipped set is now exact.
(b) SOUNDNESS (synth's catch): the trunc ops are MORE-TOTAL on ARM than in wasm — __aeabi_f2lz/
    f2ulz do NOT trap (saturate/garbage on NaN + out-of-range) while wasm REQUIRES a trap, so a
    bare builtin call would be a SILENT MISCOMPILE, strictly worse than today's honest skip.
    synth will emit domain guards + execute trap cases vs wasmtime (the #709 guard shape).

JESS FINDING that shrinks the job: the four SATURATING variants (i64.trunc_sat_f32_s/u,
i64.trunc_sat_f64_s/u) ALREADY LOWER today (nm: T). So the float->i64 half needs NO builtin —
the trapping variants = existing working trunc_sat lowering + trap guard, and synth never imports
the more-total AEABI totality it would then have to fence. Job splits cleanly:
  i64->float (4 convert): genuinely needs AEABI __aeabi_ul2f/l2f/ul2d/l2d
  float->i64 (4 trunc):   reuse trunc_sat + guard
Supplied the exact trap vectors (NaN, ±inf, >=2^63 / <-2^63 with -2^63 itself non-trapping;
<=-1.0 and >=2^64 for _u with -0.0 and (-1,0) -> 0). Committed jess to running any branch against
the real fused falcon + per-stage components, reporting skip delta BY SYMBOL NAME.

Verified: probe on synth 0.51.0, nm-confirmed lowered/skipped sets; rivet validate PASS.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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avrabe merged commit 815fa65 into main Jul 29, 2026
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avrabe deleted the finding/synth869-accepted-v052 branch July 29, 2026 04:22
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