feat(falcon): v1.124 — estimator/cascade partition + F100 pass-through fixtures (PART-P01 + PART-P02) - #287
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…h fixtures (PART-P01 + PART-P02) The 3-core split (jess#144 / DD-023), unblocked by synth #369/#708/#719 closing, built so the type system proves the boundary: PART-P01 — FlightCore is now the FUSED composition of two real structs: EstimatorPartition (IEKF propagate + gravity/dual-GNSS/mag/yaw/baro updates + calibration + spoof CUSUM -> publishes NavState, 16xf32) and CascadePartition (geometric attitude, ADRC, mixer + rotor-out FDI, position/altitude loops, RPM-notch gyro path, terrain-relative landing). The ONLY estimator->cascade crossing is NavState; the sensor fan-out (IMU sample + heading) is passed by the caller so a sim backend's one sample is never drawn twice — matching the hardware bus. Public API unchanged (delegation facade); the launch-heading capture moved from mid-fusion to the cascade consuming the PUBLISHED estimate — a seam change active only during the ~1 s pre-freeze window on heading-equipped vehicles (the analytic plant provides no heading). Oracles, all green: - The shipped v1.118 GOLDEN LOG replays f32-BIT-EXACTLY through the partitioned core (the strongest possible refactor oracle — passed first try). - partitioned_zero_delay_is_bit_exact_with_fused: 6000 ticks, estimate AND motor stream bit-identical to the fused path. - Delay robustness (the requirement's teeth): PartitionedCore models the MU/RPMsg hop — NavState delayed 1-2 ticks, jittered +/-1 (LCG, deterministic); hover holds within envelopes across 6 dispersed configs, and the rotor-out recovery keeps the v1.114 bounds (near-level thrust axis, upright touchdown) at delay 2 + jitter. PART-P02 — the gale#65 deliverables: - bench-evidence/fixtures/f100-passthrough-v1.csv: byte-exact (f32 bit pattern) pass-through conformance stream from the REAL mixer — nominal hover, saturated transient, and rank-3 rotor-out rows where motors 0 AND 2 are legitimately 00000000 (the couple-cancelling zeros a downstream re-mix would destroy: the v1.114 parasitic-moment class). Drift-gated by a non-ignored test; regen is deliberate + ignored. - terminate_reaches_motors_off_within_bound: the software half of the silence safe-state — FSM Terminate reaches motors-off actuation within the proposed 100 ms bound (gust's own heartbeat-timeout half is gale's evidence, TEST-PIX-019). falcon-core 61 tests green (5 new); clippy -D warnings clean; float gate green; rivet PASS. SWREQ-FALCON-PART-P01 + P02 -> implemented (the verify PR follows per the two-commit rule). jess#144 coordination comment posted (incl. the libm-internal-f64 finding: sinf/cosf soft- float on the M4 — the f32-kernel swap behind relay-math is the scoped follow-up). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HvusAXYbHLyv3uTzfBcMbG
Windows checkouts CRLF-translated the fixture, so the byte-exact comparison failed on that runner only. eol=lf via .gitattributes for the fixtures dir + \r\n normalization in the gate as belt. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HvusAXYbHLyv3uTzfBcMbG
ENOSPC at 23 MB free, twice on identical inputs (wasmtime 45 + the full crate universe have outgrown ubuntu-latest's free disk) — capacity, not flake. Drop the runner image's preinstalled bloat (~15 GB) first. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01HvusAXYbHLyv3uTzfBcMbG
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Verify-Filter: (has-tag "v1.124")
Implements PART-P01 + PART-P02 (→
implemented; verify PR follows per the two-commit rule) — the 3-core partition from jess#144/DD-023, unblocked by synth #369/#708/#719 all closing.PART-P01 — the split the type system proves
FlightCoreis now the fused composition of two real structs: EstimatorPartition (IEKF + every measurement update + calibration + spoof CUSUM → publishesNavState, 16×f32/64 B) and CascadePartition (attitude/ADRC/mixer + rotor-out FDI, position/altitude loops, notch path, terrain-relative landing). The only estimator→cascade crossing is NavState — the borrow checker enforces the boundary the RT1176's MU/RPMsg hop will physically impose. Sensor fan-out (IMU + heading) is caller-provided, matching the hardware bus (and keeping the sim's RNG draws single). Public API unchanged via a delegation facade; one documented seam change (launch-heading capture moved to the cascade's published-estimate view, inert on the analytic plant).Oracles (all green, most on first run):
partitioned_zero_delay_is_bit_exact_with_fused: 6000 ticks, estimate and motor stream bit-identical.PartitionedCoremodels the transport hop — NavState delayed 1–2 ticks, ±1 jitter (deterministic LCG); hover holds across 6 dispersed configs, and the rotor-out recovery keeps the v1.114 envelopes at delay 2 + jitter (near-level thrust axis, upright touchdown — the hop does not reintroduce the flip).PART-P02 — the gale#65 deliverables
bench-evidence/fixtures/f100-passthrough-v1.csv: byte-exact (f32 bit-pattern) pass-through conformance stream from the real mixer — hover, saturated transient, and rank-3 rotor-out rows where motors 0 and 2 are legitimately00000000(the couple-cancelling zeros a downstream re-mix would destroy). Drift-gated by a non-ignored test; regeneration is deliberate.terminate_reaches_motors_off_within_bound: FSM Terminate → motors-off actuation ≤ 100 ms (the software half; gust's heartbeat-timeout half is gale's evidence, TEST-PIX-019).Jointly-owned criterion, tracked not claimed: the WIT reconcile against jess's spar-generated
estimator.witruns on their committed drift gate (TEST-PIX-023, per their jess#144 confirmation) once they type NavState into REQ-PIX-007 — coordination comment posted with the measured f64 origin answer (all 480 f64 ops = 4 libm-internal functions; the estimator's ownsinf/cosfwould soft-float on the M4 → the f32-kernel swap behind relay-math is the scoped follow-up).Gates
falcon-core 61 tests (5 new), 0 fail · golden replay bit-exact · clippy
-D warningsclean · float gate green ·rivet validatePASS.🤖 Generated with Claude Code
https://claude.ai/code/session_01HvusAXYbHLyv3uTzfBcMbG