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Move this side effect to the call sites in addFile() where the groupId assignment is more visible. This makes InputFile construction safe to call from parallel contexts.
This was marked as xfail earlier for some .prefalign fixes, but is unexpectedly passing on AArch64 Premerge CI. Just mark it unsupported for now to get things back to green.
Implements P3936R1 Closes #189594 # References: - https://llvm.org/PR162236 - https://wg21.link/p3936r1 --------- Co-authored-by: A. Jiang <de34@live.cn> Co-authored-by: Hristo Hristov <zingam@outlook.com>
Implements P3953R3 - renamed test files (no changes to the contents but the function names). Closes #189624 # References: - https://llvm.org/PR105394 - https://wg21.link/p2918r2
…widening (#191650) Replace VPMULLQ/VPMAXQ/VPMINQ + var shift custom patterns
…per (#191648) Move avx512_unary_lowering so we can avoid manually writing the XMM/YMM->ZMM widening for NonVLX targets Adds some missing comments for instruction classes as well
Counterexamples for ninf and nsz: https://alive2.llvm.org/ce/z/7-Je_K Closes #189729.
Some comments in openmp-utils.cpp became outdated after the code had changed.
SymbolStringPtr comparisons should be more efficient that string comparisons. Fixes a FIXME.
… stage (#189491) This makes the scheduler's rematerialization stage use the target-independent rematerializer. Previously duplicate logic is deleted, and restrictions are put in place in the stage so that the same constraints as before apply on rematerializable registers (as the rematerializer is able to expose many more rematerialization opportunities than what the stage can track at the moment). Consequently it is not expected that this change improves performance overall, but it is a first step toward being able to use the rematerializer's more advanced capabilities during scheduling. This is *not* a NFC for 2 reasons. - Score equalities between two rematerialization candidates with otherwise equivalent score are decided by their corresponding register's index handle in the rematerializer (previously the pointer to their state object's value). This is determined by the rematerializer's register collection order, which is different from the stage's old register collection order. This is the cause of all test changes but one, and should not be detrimental to performance in real cases. - To support rollback, the stage now uses the rematerializer's rollback listener instead of its previous ad-hoc method (setting the opcode of rematerialized MIs to a DBG_VALUE, and their registers to the sentinel). This is the source of test changes in `machine-scheduler-sink-trivial-remats-debug.mir`. The new rollback mechanism completely removes the behavior tested by `misched-remat-revert.ll` so the test is deleted. --------- Co-authored-by: Shilei Tian <i@tianshilei.me>
…-class types (#155169) Fixes #104948 # References - https://wg21.link/range.iota.view - https://wg21.link/range.iota.view#17 - https://wg21.link/LWG3610 --------- Co-authored-by: A. Jiang <de34@live.cn>
Pass Instruction::Load instead of Instruction::GetElementPtr to getGEPCosts in isMaskedLoadCompress and CheckForShuffledLoads. These call sites estimate costs for wide contiguous loads and sub-vector load patterns, not for masked gather pointer vector formation. Using Instruction::GetElementPtr incorrectly triggered the gather-style cost path, which computes vector GEP formation costs. Since the call sites already add scalarization overhead for pointer vector building separately, this led to double-counting of pointer costs and inaccurate vectorization decisions. Reviewers: hiraditya, RKSimon Pull Request: #191620
…185028) This is an alternative approach to #169769. We increase the size of the old `Integral<Bits, Signed>` to 24 bytes (on a 64 bit system) and introduce a new `Char<Signed>` that's used for the old `PT_Sint8` and `PT_Uint8` primitive types. The old approach did not work out in the end because we need to be able to do arithmetic (but essentially just `+` and `-`) on the offsets of such integers-that-are-actually-pointers. c-t-t-: https://llvm-compile-time-tracker.com/compare.php?from=723d5cb11b2a64e4f11032f24967702e52f822bc&to=16dc90efebbf52e381c7655131b2fb74c307cc42&stat=instructions:u
…t non-copyable in another When a value is treated as a copyable element in one tree entry and as a non-copyable element in another, both feeding into PHI nodes, the scheduler could produce vectorized IR where an instruction does not dominate all its uses. Bail out of scheduling in tryScheduleBundle when this conflict is detected to prevent generating broken modules. Fixes #191714 Reviewers: Pull Request: #191724
…timates" This reverts commit 778c0fb to fix buildbots https://lab.llvm.org/buildbot/#/builders/213/builds/2725, https://lab.llvm.org/buildbot/#/builders/212/builds/2876 Reviewers: Pull Request: #191725
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