Skip to content

Minor fixes to spelling #408

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
Biancaa-R wants to merge 1 commit into from
Closed

Minor fixes to spelling #408

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion firmware/fw_base.S
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -253,7 +253,7 @@ _scratch_init:
blt t1, s7, _scratch_init

/*
* Relocate Flatened Device Tree (FDT)
* Relocate Flattened Device Tree (FDT)
* source FDT address = previous arg1
* destination FDT address = next arg1
*
Expand Down
4 changes: 2 additions & 2 deletions platform/generic/include/thead/c9xx_encoding.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -96,13 +96,13 @@
/* T-HEAD C9xx U mode CSR. */
#define THEAD_C9XX_CSR_FXCR 0x800

/* T-HEAD C9xx MMU extentions. */
/* T-HEAD C9xx MMU extensions. */
#define THEAD_C9XX_CSR_SMIR 0x9c0
#define THEAD_C9XX_CSR_SMEL 0x9c1
#define THEAD_C9XX_CSR_SMEH 0x9c2
#define THEAD_C9XX_CSR_SMCIR 0x9c3

/* T-HEAD C9xx Security CSR(May be droped). */
/* T-HEAD C9xx Security CSR(May be dropped). */
#define THEAD_C9XX_CSR_MEBR 0xbe0
#define THEAD_C9XX_CSR_NT_MSTATUS 0xbe1
#define THEAD_C9XX_CSR_NT_MIE 0xbe2
Expand Down
2 changes: 1 addition & 1 deletion platform/generic/platform.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -312,7 +312,7 @@ uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx, uint64_t data)
/**
* Generic platform follows the SBI specification recommendation
* i.e. zero extended event_idx is used as mhpmevent value for
* hardware general/cache events if platform does't define one.
* hardware general/cache events if platform doesn't define one.
*/
evt_val = fdt_pmu_get_select_value(event_idx);
if (!evt_val)
Expand Down
2 changes: 1 addition & 1 deletion platform/nuclei/ux600/platform.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@
#define UX600_NUCLEI_TIMER_ADDR 0x2000000
#define UX600_NUCLEI_TIMER_MSFTRST_OFS 0xFF0
#define UX600_NUCLEI_TIMER_MSFTRST_KEY 0x80000A5F
/* The clint compatiable timer offset is 0x1000 against nuclei timer */
/* The clint compatible timer offset is 0x1000 against nuclei timer */
#define UX600_CLINT_TIMER_ADDR (UX600_NUCLEI_TIMER_ADDR + 0x1000)
#define UX600_ACLINT_MSWI_ADDR (UX600_CLINT_TIMER_ADDR + \
CLINT_MSWI_OFFSET)
Expand Down
2 changes: 1 addition & 1 deletion platform/template/objects.mk
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ platform-ldflags-y =

#
# Platform RISC-V XLEN, ABI, ISA and Code Model configuration.
# These are optional parameters but platforms can optionaly provide it.
# These are optional parameters but platforms can optionally provide it.
# Some of these are guessed based on GCC compiler capabilities
#
# PLATFORM_RISCV_XLEN = 64
Expand Down