Skip to content

rustc_target: Remove unused Arch::PowerPC64LE #150966

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
rust-bors merged 1 commit into from
Jan 15, 2026
Merged

rustc_target: Remove unused Arch::PowerPC64LE #150966

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion compiler/rustc_codegen_llvm/src/mono_item.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -144,7 +144,7 @@ impl CodegenCx<'_, '_> {
}

// PowerPC64 prefers TOC indirection to avoid copy relocations.
if matches!(self.tcx.sess.target.arch, Arch::PowerPC64 | Arch::PowerPC64LE) {
if self.tcx.sess.target.arch == Arch::PowerPC64 {
return false;
}

Expand Down
9 changes: 0 additions & 9 deletions compiler/rustc_codegen_llvm/src/va_arg.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1064,15 +1064,6 @@ pub(super) fn emit_va_arg<'ll, 'tcx>(
AllowHigherAlign::Yes,
ForceRightAdjust::Yes,
),
Arch::PowerPC64LE => emit_ptr_va_arg(
bx,
addr,
target_ty,
PassMode::Direct,
SlotSize::Bytes8,
AllowHigherAlign::Yes,
ForceRightAdjust::No,
),
Arch::LoongArch32 => emit_ptr_va_arg(
bx,
addr,
Expand Down
1 change: 0 additions & 1 deletion compiler/rustc_span/src/symbol.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1723,7 +1723,6 @@ symbols! {
postfix_match,
powerpc,
powerpc64,
powerpc64le,
powerpc_target_feature,
powf16,
powf32,
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/asm/mod.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -261,7 +261,7 @@ impl InlineAsmArch {
Arch::Mips | Arch::Mips32r6 => Some(Self::Mips),
Arch::Mips64 | Arch::Mips64r6 => Some(Self::Mips64),
Arch::PowerPC => Some(Self::PowerPC),
Arch::PowerPC64 | Arch::PowerPC64LE => Some(Self::PowerPC64),
Arch::PowerPC64 => Some(Self::PowerPC64),
Arch::S390x => Some(Self::S390x),
Arch::Sparc => Some(Self::Sparc),
Arch::Sparc64 => Some(Self::Sparc64),
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_target/src/callconv/mod.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -702,7 +702,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
Arch::RiscV32 | Arch::RiscV64 => riscv::compute_abi_info(cx, self),
Arch::Wasm32 | Arch::Wasm64 => wasm::compute_abi_info(cx, self),
Arch::Bpf => bpf::compute_abi_info(cx, self),
arch @ (Arch::PowerPC64LE | Arch::SpirV | Arch::Other(_)) => {
arch @ (Arch::SpirV | Arch::Other(_)) => {
panic!("no lowering implemented for {arch}")
}
}
Expand Down
7 changes: 2 additions & 5 deletions compiler/rustc_target/src/spec/mod.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1873,7 +1873,6 @@ crate::target_spec_enum! {
Nvptx64 = "nvptx64",
PowerPC = "powerpc",
PowerPC64 = "powerpc64",
PowerPC64LE = "powerpc64le",
RiscV32 = "riscv32",
RiscV64 = "riscv64",
S390x = "s390x",
Expand Down Expand Up @@ -1911,7 +1910,6 @@ impl Arch {
Self::Nvptx64 => sym::nvptx64,
Self::PowerPC => sym::powerpc,
Self::PowerPC64 => sym::powerpc64,
Self::PowerPC64LE => sym::powerpc64le,
Self::RiscV32 => sym::riscv32,
Self::RiscV64 => sym::riscv64,
Self::S390x => sym::s390x,
Expand Down Expand Up @@ -1940,8 +1938,8 @@ impl Arch {

AArch64 | AmdGpu | Arm | Arm64EC | Avr | CSky | Hexagon | LoongArch32 | LoongArch64
| M68k | Mips | Mips32r6 | Mips64 | Mips64r6 | Msp430 | Nvptx64 | PowerPC
| PowerPC64 | PowerPC64LE | RiscV32 | RiscV64 | S390x | Sparc | Sparc64 | Wasm32
| Wasm64 | X86 | X86_64 | Xtensa => true,
| PowerPC64 | RiscV32 | RiscV64 | S390x | Sparc | Sparc64 | Wasm32 | Wasm64 | X86
| X86_64 | Xtensa => true,
}
}
}
Expand Down Expand Up @@ -3436,7 +3434,6 @@ impl Target {
Arch::Arm64EC => (Architecture::Aarch64, Some(object::SubArchitecture::Arm64EC)),
Arch::AmdGpu
| Arch::Nvptx64
| Arch::PowerPC64LE
| Arch::SpirV
| Arch::Wasm32
| Arch::Wasm64
Expand Down
8 changes: 1 addition & 7 deletions compiler/rustc_target/src/target_features.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -986,7 +986,6 @@ impl Target {
Arch::AmdGpu
| Arch::Avr
| Arch::Msp430
| Arch::PowerPC64LE
| Arch::SpirV
| Arch::Xtensa
| Arch::Other(_) => &[],
Expand Down Expand Up @@ -1015,12 +1014,7 @@ impl Target {
Arch::CSky => CSKY_FEATURES_FOR_CORRECT_FIXED_LENGTH_VECTOR_ABI,
// FIXME: for some tier3 targets, we are overly cautious and always give warnings
// when passing args in vector registers.
Arch::Avr
| Arch::Msp430
| Arch::PowerPC64LE
| Arch::SpirV
| Arch::Xtensa
| Arch::Other(_) => &[],
Arch::Avr | Arch::Msp430 | Arch::SpirV | Arch::Xtensa | Arch::Other(_) => &[],
}
}

Expand Down
1 change: 0 additions & 1 deletion src/tools/miri/src/shims/alloc.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,6 @@ pub trait EvalContextExt<'tcx>: crate::MiriInterpCxExt<'tcx> {
| Arch::Bpf
| Arch::Msp430
| Arch::Nvptx64
| Arch::PowerPC64LE
| Arch::SpirV
| Arch::Other(_)) => bug!("unsupported target architecture for malloc: `{arch}`"),
};
Expand Down
Loading