Promotes 5 Thumb-mode bare-metal Arm targets to Tier 2

[cezarbbb]

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This PR promotes five Thumb-mode bare-metal Arm targets to Tier 2, joining their Arm-mode counterparts which are already Tier 2:

Thumb-mode target (Tier 3 → Tier 2)	Arm-mode counterpart (already Tier 2)
thumbv7a-none-eabi	armv7a-none-eabi
thumbv7a-none-eabihf	armv7a-none-eabihf
thumbv7r-none-eabi	armv7r-none-eabi
thumbv7r-none-eabihf	armv7r-none-eabihf
thumbv8r-none-eabihf	armv8r-none-eabihf

Note: There is no thumbv8r-none-eabi target because the Cortex-R52 processor always includes an FPU, making a soft-float ABI variant unnecessary.

These Thumb-mode targets generate T32 code by default while their Arm-mode counterparts generate A32 code. They share the same LLVM backend, ABI, and data layout — the only spec differences are the llvm_target string and the description.

See rust-lang/compiler-team#985

[rustbot]

Some changes occurred in src/doc/rustc/src/platform-support

cc @Noratrieb

These commits modify compiler targets.
(See the Target Tier Policy.)

[rustbot]

r? @adwinwhite

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[petrochenkov]

Blocked on rust-lang/compiler-team#985.
@rustbot blocked

[cezarbbb]

@rustbot ping arm-maintainers
As the T32 and A32 targets share a page in the rustc book, can you continue to be the maintainers of these targets?

[rustbot]

Error: Only Rust team members can ping teams.

Please file an issue on GitHub at triagebot if there's a problem with this bot, or reach out on #triagebot on Zulip.

[SparrowLii]

@rustbot ping arm-maintainers
:)

[rustbot]

Error: This team (arm-maintainers) cannot be pinged via this command; it may need to be added to triagebot.toml on the default branch.

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[thejpster]

arm-maintainers said yes over on rust-lang/compiler-team#985 (comment) (just for anyone else looking at this without looking at that thread first)

[rustbot]

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

[cezarbbb]

@petrochenkov The FCP is complete

[petrochenkov]

@bors r+

[rust-bors]

📌 Commit f45a817 has been approved by petrochenkov

It is now in the queue for this repository.

[cezarbbb]

It appears that +fp.sp only enabled single-precision FPUs and did not support double-precision instructions. It has now been changed to +fp, consistent with the handling of armv7r-none-eabihf.

[JonathanBrouwer]

@bors try jobs=dist-various-1

[rust-bors]

💔 Test for 3ead6a8 failed: CI. Failed job:

• try - dist-various-1 (web logs, enhanced plaintext logs)

[cezarbbb]

@JonathanBrouwer Hmm this error seems to be a Docker Hub network issue? Can you try job again?

[JonathanBrouwer]

@bors try jobs=dist-various-1
Yep, github moment

[rust-bors]

💔 Test for db682f4 failed: CI. Failed job:

• try - dist-various-1 (web logs, enhanced plaintext logs)

[cezarbbb]

Seems like cc-rs only automatically adds -mthumb, so -mfpu needs to be provided by the Dockerfile CFLAGS.

[JonathanBrouwer]

@bors try jobs=dist-various-1

[rust-bors]

☀️ Try build successful (CI)
Build commit: 953da85 (953da853c0a78a6b15ebd589ec51d913ba8c1f9b, parent: 4f84d9fac456d973d592cf3fb48db958ecf22506)

[JonathanBrouwer]

I'm not super familiar with all these build tooling flags and their consequences so I'll wait for @petrochenkov to re-review and reapprove

[petrochenkov]

@cezarbbb
I'm not sure, how were the -mfpu flags selected?

[cezarbbb]

Hi. I found that cc-rs automatically adds three key flags for armv7r-none-eabihf: -marm / -march=armv7-r / -mfpu=vfpv3-d16 (see cc-rs/src/lib.rs:2476-2495), but the Thumb targets — thumbv7r-none-eabihf, thumbv7a-none-eabihf, thumbv8r-none-eabihf — don't match those branches. cc-rs only adds -mthumb for them, not -march or -mfpu.

ARM and Thumb differ only in instruction encoding; the underlying hardware requirements are identical. For example, armv7r_none_eabihf.rs:20 and thumbv7r_none_eabihf.rs:20 both specify +vfp3d16, and armv7a_none_eabihf.rs:20 and thumbv7a_none_eabihf.rs:20 both specify +vfp3d16,-neon,+strict-align. So they need the same -mfpu=vfpv3-d16. My approach is simply to replicate the FPU that cc-rs already selects for the ARM variants, written explicitly in the Thumb variants' Dockerfile CFLAGS.

For thumbv8r-none-eabihf's -mfpu=fp-armv8, I simply followed @thejpster's existing armv8r config in the Dockerfile. I also want to ask @thejpster, does these approaches above look correct to you?

[cezarbbb]

@rustbot ready