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Update LLVM to 22.1.6 #156757

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Merged
rust-bors merged 1 commit into from
May 21, 2026
Merged

Update LLVM to 22.1.6 #156757

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2 changes: 1 addition & 1 deletion .gitmodules
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Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,7 @@
[submodule "src/llvm-project"]
path = src/llvm-project
url = https://github.com/rust-lang/llvm-project.git
branch = rustc/22.1-2026-03-22
branch = rustc/22.1-2026-05-19
shallow = true
[submodule "src/doc/embedded-book"]
path = src/doc/embedded-book
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2 changes: 1 addition & 1 deletion src/llvm-project
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Submodule llvm-project updated 83 files
+4 −0 clang-tools-extra/docs/ReleaseNotes.rst
+360 −0 clang/cmake/caches/cross-linux-toolchain.cmake
+1 −0 clang/docs/ReleaseNotes.rst
+14 −1 clang/include/clang/AST/DeclBase.h
+3 −1 clang/include/clang/AST/DeclContextInternals.h
+4 −3 clang/include/clang/Basic/Attr.td
+1 −1 clang/include/clang/Basic/AttrDocs.td
+9 −10 clang/lib/AST/ASTContext.cpp
+1 −0 clang/lib/AST/Decl.cpp
+2 −1 clang/lib/AST/DeclBase.cpp
+1 −1 clang/lib/AST/Expr.cpp
+19 −3 clang/lib/CodeGen/BackendUtil.cpp
+7 −2 clang/lib/CodeGen/CGDecl.cpp
+16 −11 clang/lib/CodeGen/CoverageMappingGen.cpp
+1 −1 clang/lib/Driver/ToolChains/Clang.cpp
+1 −1 clang/lib/Sema/SemaLookup.cpp
+1 −0 clang/lib/Serialization/ASTReaderDecl.cpp
+17 −0 clang/test/CodeGenCXX/builtin_FUNCTION.cpp
+42 −0 clang/test/CodeGenCoroutines/coro-param-fake-use.cpp
+42 −0 clang/test/CoverageMapping/system_macro_switch.cpp
+33 −0 clang/test/DebugInfo/Generic/codeview-buildinfo.c
+47 −0 clang/test/Modules/include-between-imports-enums.cppm
+13 −0 clang/test/SemaCXX/member-pointer.cpp
+10 −0 clang/test/SemaCXX/source_location.cpp
+1 −1 cmake/Modules/LLVMVersion.cmake
+9 −12 compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
+1 −1 libcxx/include/__config
+1 −1 libunwind/src/AddressSpace.hpp
+1 −1 libunwind/src/DwarfParser.hpp
+7 −6 lld/ELF/LinkerScript.cpp
+22 −5 lldb/source/Host/common/File.cpp
+6 −0 lldb/test/API/tools/lldb-dap/source/TestDAP_source.py
+3 −2 lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
+1 −0 lldb/utils/TableGen/CMakeLists.txt
+27 −0 llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+1 −0 llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+1 −7 llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+13 −6 llvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp
+17 −11 llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+27 −27 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+179 −32 llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
+2 −1 llvm/lib/Target/Mips/MipsInstrInfo.cpp
+21 −0 llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+1 −1 llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+5 −0 llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
+2 −0 llvm/lib/Target/SystemZ/SystemZInstrInfo.h
+50 −3 llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+27 −0 llvm/lib/Target/X86/X86FastISel.cpp
+6 −7 llvm/lib/Target/X86/X86ISelLowering.cpp
+4 −0 llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+95 −0 llvm/test/CodeGen/AArch64/aarch64_be-shuffle-vector.ll
+0 −39 llvm/test/CodeGen/AArch64/fix-shuffle-vector-be-rev.ll
+50 −0 llvm/test/CodeGen/Mips/gprestore.ll
+221 −84 llvm/test/CodeGen/Mips/llvm-ir/load.ll
+225 −35 llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll
+61 −0 llvm/test/CodeGen/Mips/mips1-load-in-delay-slot.ll
+62 −6 llvm/test/CodeGen/Mips/unalignedload.ll
+162 −0 llvm/test/CodeGen/PowerPC/soft-promote-half-br-cc.ll
+464 −0 llvm/test/CodeGen/SystemZ/args-23.ll
+102 −0 llvm/test/CodeGen/SystemZ/patchable-function-entry.ll
+62 −2 llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
+61 −1 llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
+25 −32 llvm/test/CodeGen/WebAssembly/exception.ll
+8 −4 llvm/test/CodeGen/X86/avx2-masked-gather.ll
+85 −0 llvm/test/CodeGen/X86/bf16-fast-isel.ll
+58 −0 llvm/test/CodeGen/X86/fast-isel-struct-ret.ll
+106 −0 llvm/test/CodeGen/X86/i1-fast-isel.ll
+2 −1 llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll
+6 −6 llvm/test/CodeGen/X86/masked_store_trunc.ll
+6 −6 llvm/test/CodeGen/X86/masked_store_trunc_ssat.ll
+6 −6 llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
+26 −0 llvm/test/CodeGen/X86/pr179100.ll
+30 −30 llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+14 −14 llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
+32 −32 llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
+63 −63 llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
+8 −26 llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll
+41 −0 llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
+17 −42 llvm/test/CodeGen/X86/vector-shuffle-combining.ll
+21 −0 llvm/test/Transforms/SLPVectorizer/loads-with-large-distance.ll
+1 −1 llvm/utils/gn/secondary/llvm/version.gni
+1 −1 llvm/utils/lit/lit/__init__.py
+1 −1 llvm/utils/mlgo-utils/mlgo/__init__.py
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