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Fix minor typos in the section about MIPS pipelining #10

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Fix minor typos in the section about MIPS pipelining #10

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2 changes: 1 addition & 1 deletion guide.tex
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Expand Up @@ -1807,7 +1807,7 @@ \subsection{Branch delay slots}
\code{set\_reg} instead of checking if the register was 0).

MIPS however doesn't do that. It doesn't bother wasting time flushing
the pipeline, it just ignore the issues and run the code anyway. What
the pipeline, it just ignores the issues and runs the code anyway. What
this means is that the first instruction right \emph{after} a branch
always gets executed \emph{before} the branch is taken,
\emph{unconditionaly}. This instruction is said to be in the
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