[draft] v2.0

[martafafara]

TS developed v2.0 of Fast Servo project. Changes gathered in the issue introduced. The last thing is P12V_DIOT power domain connection. Simulatnouesly to Fast Servo, newer version of DIOT_Template is developed and 2 concept is considered. The final decision will be made during one week. Despite of that the rest could be reviewed. Any remarks will be kindly seen.

[linuswck]

IMO, ADA4930 may not be stable under the current PCB layout/Schematics connections.

ADA4930 was used on DAC AFE in the previous revision. It was unstable even when I removed the feedback capacitor for low pass filtering on the v1.0 board. This part is pretty layout sensitive.

Here are a few problems I saw in schematics/layout.

1. No void zone under and near the RG, RF resistors
   (From Datasheet)

2. R41, R43 should be removed as they are duplicated.

3. Component placement and Routing are not symmetric in general

• Both gain selection switches (SW1, SW3) should be placed on the top layer.

4. Add 0402 input capacitor pads across the input of ADA4930

• It helps stabilizing the opamp. See this test result.
• Mark its value as DNP by default

[martafafara]

Thank you for all remarks. Schematic ones are already introduced, the layout issues require a little bit more time. I've not noticed that I moved problems with ADA4930 from one part of layout to another one. How do you judge - it's better to improve layout or find another IC instead?

[linuswck]

I think improving the layout should be done. If possible, a prototype board with only the ADC AFE on it should be produced for verification before updating the design.

I do not know if this FDA is overkill for its noise specifications. I haven't looked into the noise budget for ADC. As far as I know, this is the FDA with the best noise specifications in the whole ADI FDA line up. If the noise spec is overkill, we can choose another OpAmp with lower bandwidth, which should, in theory, cause less layout related problem.

[martafafara]

I will do my best to improve layout according to your suggestion. As for now I'm not able to decide about the prototype.

[martafafara]

@linuswck Could you take a look to newest changes?

• After consultation P12V PoE would be disconnected from board from DIOT or EEM version using the jumper (should be shorten when standalone version is required), the rest do not require any particular protection
• I introduced all your remarks, check it out

[linuswck]

Thank you for updating. The new changes look good to me.

Can you change the input capacitor(C83) at the ADC AFE ADA4930 input IN+ and IN- to be an undefined one (CC0402_NO-VALUE)?
(I ran an simulation and I found that it will get unstable if 100nF is fitted there.)

[martafafara]

Change introduced

[linuswck]

In PWR_P12V0A_N12V0A.SchDoc,

There will be a high voltage drop across the NMOS (Vgs specifically).
I think we can replace the circled switch with a solder jumper or 0R jumper resistor. Or replace it with a PMOS?

[linuswck]

In PWR_SMPS.SchDoc,

R204 should be 240k.
Vout = (510k/240k+1)*0.8 = 2.5V

[linuswck]

In Termination_Switch.SchDoc

In SOM_JB2.SchDoc

This shows the possible TERM_SEL0 Output Voltage levels.

IRFML8244TRPBF's Vgs is 1.35-1.7V(Typical)-2.35V. This circuit may not work on if PWR_Bank13 is 1V8.

I suggest replacing it with another NMOS P/N in SOT23 package or simply just use one NTJD4401NT1G for both channels, which Vgs is 0.6V-0.92V(Typical)-1.5V.

[linuswck]

In Dac_AFE.SchDoc,


Add back to back Shockley diode for LT1568 V+ & V- pin.

[linuswck]

In Dac_AFE.SchDoc,

Change R292's and R293's value to 5R1 so that the load on OUT_P and OUT_N on LT1568 matches for differential load

[martafafara]

I really appreciate that you are making such detailed review. It would improve both the final project and my personal skills to take into account more factor while designing. Please, let me know when you find review finished. I would implement all of them at once as soon as possible.

[linuswck]

We are making a prototype batch. And I have made changes on the PCB layout based on the DFM feedback from the PCB manufacturer. I will let you know in one go within this week.

[martafafara]

Could you tell me what exactly was taken as "prototype" - my previous release or your reworked version? I'm a little bit worried that the project can lost its traceability. Maybe some release should be done and further work starts from this point?

[linuswck]

Sorry for not keeping you up to date as we are trying to get it manufactured in time before the Chinese New Year holiday in the mainland.

The purpose of that prototype is to evaluate whether the implemented firmware feature is still functional after the hardware update. So, we have created a "standalone/EEM" variant for this design project in variant manager in AD25. DIOT things will remain untested in the prototype.

The PCB manufacturer and I have spotted a few more issues during the DFM stage.

1. AG5400 cannot be fitted into the AG5300 footprint. The physical dimensions are quite different. The silkscreen and 3D model is for AG5300 only. So, we should not label it as AG5400 compatible...

• BOM item cannot be changed after the order is placed in the PCB firm......
• So, I have shuffle the components a little bit to make AG5400 fit. And recreate the intended silkscreen outline for the components for our reference.
• 

2. Exposed solder mask are not be aligned with the holes on the exposed pads

• 

3. There is a trace in an area with solder mask exposed.

• Running trace in that area is unnecessary. I have relocated the trace.
• 

4. Void zone for ADC AFE ADA4930

• I have re-examined EVAL-FDA-2 board in person. The void zone ADI meant is to remove ALL copper plane under the sensitive signal path. Not just the closest GND plane. So, I do so in the prototype and adjust the position of components accordingly.
• 
• 

In terms of schematics changes, I have marked them with clearly on schematics so it is traceable.

[martafafara]

Those schematic marks are the ones listed in above comments or any other appeared? In the second case could you share your version of project?

[linuswck]

I just uploaded them. This "prototype" version has been put into production.
https://github.com/linuswck/Fast_Servo/tree/v2_0_prototype

[martafafara]

I applied most of your remarks. I'm just confused ad1. I checked datasheet of both circuits and comparison looks as below:

The only one dimension differs. What am I missing?

[linuswck]

I applied most of your remarks. I'm just confused ad1. I checked datasheet of both circuits and comparison looks as below:

The only one dimension differs. What am I missing?

I am referring to the diagram below.

[linuswck]

I have finished debugging the prototype we made. All the issues/recommendations are documented in https://github.com/linuswck/Fast_Servo/issues