Carleton University / ELEC4609 Integrated Circuit Design and Fabrication / Project: Static Logic PRSG (Pseudo Random Sequence Generator) chip design, fabrication and testing.
-
Updated
Aug 6, 2024
Carleton University / ELEC4609 Integrated Circuit Design and Fabrication / Project: Static Logic PRSG (Pseudo Random Sequence Generator) chip design, fabrication and testing.
An agentic AI workflow for SiN waveguide design that bridges modesolverpy, SAX+JAX, and gdsfactory via FastMCP. It handles eigenmode solving and inverse design for GDSII mask output, powered by AWS Bedrock AgentCore, Strands SDK, and hybrid S3/DynamoDB storage
Add a description, image, and links to the chip-fabrication topic page so that developers can more easily learn about it.
To associate your repository with the chip-fabrication topic, visit your repo's landing page and select "manage topics."