riscv: keep mstatus.MPP=M after mret on harts without U-mode - #2396
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riscv: keep mstatus.MPP=M after mret on harts without U-mode#2396carlosqwqqwq wants to merge 1 commit into
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riscv: keep mstatus.MPP=M after mret on harts without U-mode
Fixes #2391
Problem
helper_mretunconditionally writesmstatus.MPP = PRV_U. On a hart whose MISA does not include U, the least-privileged supported mode is M, so aftermretthe MPP field must read 3, not 0. The reproducer runs on a locally built no-U model library (defaultriscv_anywith RVU cleared; stock E51/U54 keep U as the control).Change
qemu/target/riscv/op_helper.chelper_mretwritesMSTATUS_MPP = PRV_Uunconditionally. The fix selectsPRV_Uonly whenriscv_has_ext(env, RVU), otherwisePRV_M, mirroring upstream QEMU'smretimplementation. The proposed change is source-only and contains no test-framework or repository-local changes.Regression scope
The regression must verify the CSR field reads back its legal value after a write of a reserved/illegal value (and that the legal encodings still read back unchanged), and that a U-enabled control model keeps the previous behavior. Existing CSR tests must remain unchanged.