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8-Bit CPU

A fully custom, hand-crafted 8-bit CPU designed from first principles in Logisim-Evolution — no prebuilt RAM, no cheat components, just raw logic, microcode, and plenty of stubborn curiosity.

This processor features its own Instruction Set Architecture (ISA), a microcoded control unit, and a gate-level RAM module implemented entirely with flip-flops and decoders.

Project Highlights

  • 8-bit Datapath, 4-bit Address Bus, and 16 bytes of hand-built RAM.
  • Microcoded Control Unit with ROM-driven sequencing (T-states + flags → control signals).
  • Conditional Execution using Zero and Carry flags wired directly into the microcode address lines.
  • Manual Program Loader — flip-switch your own machine code straight into RAM.
  • Step-by-Step Execution using a 4-stage microcycle counter (T0 → T4).

Architecture Overview

Datapath Components

  • Program Counter
  • Instruction Register
  • Register A (Accumulator)
  • Register B
  • ALU (supports Add/Sub, sets flags)
  • Output Register (BCD display)
  • MAR (Memory Address Register)
  • RAM (16×8, built from D-FFs)

Control Components

  • 8× wide microcode ROM
  • 4-bit micro-step counter
  • Flag register (Zero + Carry)
  • Conditional microcode branching

Instruction Set Architecture (ISA)

All instructions follow the standard Fetch → Decode → Execute cycle.

Opcode Mnemonic Meaning
0000 NOP Do nothing (literally)
0001 LDA Load A ← RAM[address]
0010 ADD A ← A + B
0011 SUB A ← A − B
0100 STA RAM[address] ← A
0101 LDI A ← immediate 8-bit value
0110 JMP PC ← address
0111 JC Jump if Carry flag = 1
1000 JZ Jump if Zero flag = 1
1110 OUT Output A to the display
1111 HLT Halt clock; freeze CPU

Microcode & Control Logic

Each instruction expands into up to four micro-steps (T0–T4), generating control signals for:

  • Register enabling/disabling
  • ALU mode selection
  • RAM read/write
  • PC increment/load
  • Conditional jumps using flags

The ROM address format:

[ T-state (3 bits) | Opcode (4 bits) | Flags (2 bits) ]

Project Structure

/
├── cpu.circ               # Main Logisim-Evolution file
├── assets/
│   ├── cpu.png            # Datapath overview
│   └── control-logic.jpeg # Handwritten microcode planning
├── README.md              # You're reading it!
└── rom/                   # ROM hex logic

Running the CPU

  1. Install Logisim-Evolution.
  2. Open cpu.circ.
  3. Select the main circuit.
  4. Toggle the step clock manually… or hit Ctrl + K for auto-clocking.

Want to write programs? Flip the PROGRAM_MODE switch and manually poke bytes into RAM like it’s 1971.

About

An 8-bit, microprogrammed CISC-style processor featuring a 5-step control sequence, flag-based branching, and handcrafted memory.

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