- 🎓 Ph.D. in Computer and Embedded System Engineering at Universiti Putra Malaysia (UPM), Malaysia
- ⏮️ Previous experiences with ASIC chip tape-out, FPGA project, and embedded system development
- 🌱 Currently learning Git VCS and SoC design & verification
- 👀 Interested in ASIC & FPGA design, Design Automation and AI Machine Learning
Y. W. Lim, N. A. Kamsani, R. M. Sidek, S. J. Hashim and F. Z. Rokhani, “Energy-Performance Optimization via P/N Ratio Sizing with Full Diffusion Layout Structure and Standard Cell Height Tuning in Near-Threshold Voltage Operation,” in IEEE Access, vol. 11, pp. 12536-12546, 2023.