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Add Gen6 FOC vs MPC simulation study - #31

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saeed95-lab wants to merge 39 commits into
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saeed95-lab:feature/gen6-foc-vs-mpc-simulation
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Add Gen6 FOC vs MPC simulation study#31
saeed95-lab wants to merge 39 commits into
OpenVVVF:mainfrom
saeed95-lab:feature/gen6-foc-vs-mpc-simulation

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Summary

  • Adds a host-side Gen6 FOC vs FCS-MPCC (optimal-duty) comparison study with bench-motor parameters, including the paper_foc_vs_mpc runner, plot scripts, and sample results under results/paper_foc_vs_mpc/.
  • Includes the underlying three-phase PMSM FCS-MPCC simulation/controller stack this study builds on (Lib/Simulation, MPCC modes, Gen6-related fixes).
  • Related prior PR: Add host FCS-MPCC simulation and control.mpcc node for three-phase PMSM #5 (feature/fcs-mpcc-three-phase-pmsm). This branch adds the FOC vs MPC paper comparison on top of that work.

Test plan

  • cmake -B build -G Ninja && cmake --build build -j8 --target paper_foc_vs_mpc
  • ./build/Lib/Simulation/paper_foc_vs_mpc writes CSVs under results/paper_foc_vs_mpc/
  • python3 scripts/plot_paper_foc_vs_mpc.py regenerates Case 1 / Case 2 plots
  • Confirm Case 1: MPC faster rise, higher ripple vs FOC; Case 2: both near 2000 rpm with shared outer speed PI
  • Run Simulation unit tests via ctest --test-dir build --output-on-failure if available in this tree

saeed95-lab and others added 30 commits July 30, 2026 19:16
Introduce Lib/Simulation (dq plant, eight-state VSI, MPCC/FOC runners and tests),
the control.mpcc graph template, and docs/scripts so predictive current control
can be verified on host before STM32 PWM adapter work.
- Add Assets/Examples/mpcc_demo.json: full FCS-MPCC hardware graph with
  phase currents, encoder, DC-link, FRAM config params, and telemetry.
- Add Transforms.SwitchToDuty node: maps switch states (0/1) to 0%/100%
  duty for the existing Actuators.PwmOut.
- Add Values.Config/constructor.cpp: restore platform_config_load() call
  that was dropped when config.value was renamed to Values.Config.
- Fix control.mpcc: correct angular-velocity unit to au::radians/au::seconds,
  add port/parameter descriptions.
- Fix CodeGenerator: treat Values.Config as a config node.
Conventional FCS picks S111 on low-L motors because one full vector
predicts ~1000 A per step; Mode 3 applies deadbeat voltage through
SVPWM so duties are continuous and Iq can track.
Bypass IqGate and stop CfgEnable from forcing ThrottleEnable off.
Mode 3 now uses a shorter Ts_Eff plus residual current integrators so
low-L deadbeat voltages are not lost to inverter deadtime.
Reload Values.Config from FRAM in TimIsrStart, guard Poles<=0 in ElecAngle, and trip Mode 3 voltage when measured current exceeds I_Max.
Replace aggressive Ts_Eff/Ki and hard overcurrent trip with FOC-like gains, voltage LPF, soft current foldback, and wire L/Rs/Psi from FRAM.
Sanitize Ld/Lq when Config is 0, restore Config.Value on control start, guard EncoderSign≈0, and add mpcc_ld/lq/sign/theta_mech telemetry.
SelfExecutablePath used Linux-only /proc/self/exe; add Apple support and still fall back to PATH when needed.
Unwrap θe derivative spikes, clamp Ωe feedforward, persist non-zero motor/encoder FRAM defaults, harden OC latch, and detune Mode 3 gains.
Raise Mode 3 gains, set I_Max=40 with a higher OC latch threshold, and slow Iq slew for Gen6 bring-up.
Hard OC latch and aggressive gains locked the rotor with huge current; Config repair also treated Sign=-1 as missing and forced +1.

Co-authored-by: Cursor <cursoragent@cursor.com>
Session 215141 pinned duties near 50% via an rs-based stall cap (~2 V with Rs≈0.012 Ω) and iq tracked opposite IqVar; match FOC gains/limits and flip q-axis error polarity.

Co-authored-by: Cursor <cursoragent@cursor.com>
Session 220144 still had FRAM Sign=+1 (wrong θe, id ±40 A) and soft foldback that kept duties near 50%; wire Sign=-1 and raise L/Ts current gains.

Co-authored-by: Cursor <cursoragent@cursor.com>
…emo)

Main fixed the FOC current-dump regression (lost sensor sign inversion
in the node-library overhaul) via a configurable InvertPolarity
parameter. Port the same template here and enable it on the Currents
node so the MPCC loop gets correctly-signed feedback.
Use deadbeat voltage→SVPWM without hard OC foldback, match FOC encoder Sign (+1/FRAM), and document the safe first-spin procedure.

Co-authored-by: Cursor <cursoragent@cursor.com>
datacrystals and others added 7 commits July 31, 2026 14:37
The graph's embedded Sensors.PhaseCurrents uses the InvertPolarity
parameter (ported from main), but the node instance never set it, so
codegen emitted no binding and the build failed with
'InvertPolarity was not declared in this scope'.
Lift ωe clamp to ±3000 rad/s, increase deadbeat gain scale to 0.70, and match FOC Iq slew (50 A/s) so 100 V high-speed runs are not starved.

Co-authored-by: Cursor <cursoragent@cursor.com>
Fixes optimal-duty FCS-MPCC for synchronous sim, adds bench-motor comparison runner/plots, and keeps this work separate from the prior hardware MPCC branch.

Co-authored-by: Cursor <cursoragent@cursor.com>
Softens deadbeat/integral, adds Vdc guards and Iq clamps, retunes mpcc_demo limits/slew, and documents a 50 V quiet bring-up path.

Co-authored-by: Cursor <cursoragent@cursor.com>
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Smooth-spin MPCC update pushed

Hardened Mode 3 for quiet Gen6 bring-up (especially ~50 V):

  • db_scale 0.70 → 0.35, integral ki=2, soft-start 250 ms
  • Hold unless Vdc ≥ 40 V; Vdc-aware |Iq*| clamp (~5 A near 50 V)
  • Soft OC scales feedback only (keeps FF); anti-windup under voltage saturation
  • PsiF clamp raised to 0.15; Modes 0–2 delay model fixed in dq
  • mpcc_demo: I_Max=8, IqVar default 0, Iq slew 10 A/s

Please reflash Assets/Examples/mpcc_demo.json, confirm vdc_v≈50, then ramp Iq 1→2→3 A.

Saeed Aliamooei Lakeh and others added 2 commits August 2, 2026 14:47
Rely on I_Max only, raise deadbeat slightly for 50 V tracking, and allow Iq commands up to 15 A in mpcc_demo.

Co-authored-by: Cursor <cursoragent@cursor.com>
Add current LPF, clamp Id/Iq refs to I_Max, and prioritize Vq under saturation so mid-bus field-weakening spins more like FOC.

Co-authored-by: Cursor <cursoragent@cursor.com>
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3 participants