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8 changes: 4 additions & 4 deletions core/cpu/ins.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -379,19 +379,19 @@ void CPU::JR_NC() {
// SECTION - Rotate Instructions
// Same as corresponding PFX ins, but for A register
void CPU::RLA() {
A_Wrapper(PFX_RL);
A_Wrapper(&CPU::PFX_RL);
}

void CPU::RLCA() {
A_Wrapper(PFX_RLC);
A_Wrapper(&CPU::PFX_RLC);
}

void CPU::RRA() {
A_Wrapper(PFX_RR);
A_Wrapper(&CPU::PFX_RR);
}

void CPU::RRCA() {
A_Wrapper(PFX_RRC);
A_Wrapper(&CPU::PFX_RRC);
}

// SECTION: Misc Instructions
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44 changes: 22 additions & 22 deletions core/cpu/ins_prefix.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -22,129 +22,129 @@ void CPU::PFX()
if (pfx_rs_family_index == 0b100) {
// SLA
if (pfx_register_index == 0b110) { // 0b110 corresponds to (HL) operand
HL_Wrapper(PFX_SLA);
HL_Wrapper(&CPU::PFX_SLA);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_SLA);
R8_Wrapper(&CPU::PFX_SLA);
cycles = (1 + 1);
}
}

if (pfx_rs_family_index == 0b000) {
// RLC
if (pfx_register_index == 0b110) {
HL_Wrapper(PFX_RLC);
HL_Wrapper(&CPU::PFX_RLC);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_RLC);
R8_Wrapper(&CPU::PFX_RLC);
cycles = (1 + 1);
}
}

if (pfx_bit_index == 0b101) { // SRA
// SRA
if (pfx_register_index == 0b110) {
HL_Wrapper(PFX_SRA);
HL_Wrapper(&CPU::PFX_SRA);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_SRA);
R8_Wrapper(&CPU::PFX_SRA);
cycles = (1 + 1);
}
}

if (pfx_rs_family_index == 0b001) {
// RRC
if (pfx_register_index == 0b110) {
HL_Wrapper(PFX_RRC);
HL_Wrapper(&CPU::PFX_RRC);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_RRC);
R8_Wrapper(&CPU::PFX_RRC);
cycles = (1 + 1);
}
}

if (pfx_bit_index == 0b111) { // SRL
// SRL
if (pfx_register_index == 0b110) {
HL_Wrapper(PFX_SRL);
HL_Wrapper(&CPU::PFX_SRL);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_SRL);
R8_Wrapper(&CPU::PFX_SRL);
cycles = (1 + 1);
}
}

if (pfx_rs_family_index == 0b010) {
// RL
if (pfx_register_index == 0b110) { // 0b110 corresponds to (HL) operand
HL_Wrapper(PFX_RL);
HL_Wrapper(&CPU::PFX_RL);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_RL);
R8_Wrapper(&CPU::PFX_RL);
cycles = (1 + 1);
}
}

if (pfx_rs_family_index == 0b011) {
// RR
if (pfx_register_index == 0b110) { // 0b110 corresponds to (HL) operand
HL_Wrapper(PFX_RR);
HL_Wrapper(&CPU::PFX_RR);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_RR);
R8_Wrapper(&CPU::PFX_RR);
cycles = (1 + 1);
}
}

if (pfx_rs_family_index == 0b110) {
// SWAP
if (pfx_register_index == 0b110) {
HL_Wrapper(PFX_SWAP);
HL_Wrapper(&CPU::PFX_SWAP);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_SWAP);
R8_Wrapper(&CPU::PFX_SWAP);
cycles = (1 + 1);
}
}
}
else if (pfx_ins_family_index == 0b01) {
// BIT family
if (pfx_register_index == 0b110) { // 0b110 corresponds to (HL) operand
HL_Wrapper(PFX_BIT);
HL_Wrapper(&CPU::PFX_BIT);
cycles = (2 + 1);
}
else {
R8_Wrapper(PFX_BIT);
R8_Wrapper(&CPU::PFX_BIT);
cycles = (1 + 1);
}
}
else if (pfx_ins_family_index == 0b10) {
// RES family
if (pfx_register_index == 0b110) { // 0b110 corresponds to (HL) operand
HL_Wrapper(PFX_RES);
HL_Wrapper(&CPU::PFX_RES);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_RES);
R8_Wrapper(&CPU::PFX_RES);
cycles = (1 + 1);
}
}
else if (pfx_ins_family_index == 0b11) {
// SET family
if (pfx_register_index == 0b110) { // 0b110 corresponds to (HL) operand
HL_Wrapper(PFX_SET);
HL_Wrapper(&CPU::PFX_SET);
cycles = (3 + 1);
}
else {
R8_Wrapper(PFX_SET);
R8_Wrapper(&CPU::PFX_SET);
cycles = (1 + 1);
}
}
Expand Down
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