[MCS51] Add mcs51-unknown-none-elf Tier 3 target#2
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Liz Shirley (elizabethshirley) wants to merge 1 commit into
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[MCS51] Add mcs51-unknown-none-elf Tier 3 target#2Liz Shirley (elizabethshirley) wants to merge 1 commit into
Liz Shirley (elizabethshirley) wants to merge 1 commit into
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Adds the MCS51 (8051) architecture as a Tier 3 Rust target. Target triple: mcs51-unknown-none-elf - 16-bit pointer width, 8-bit Harvard architecture - Bare-metal embedded (no_std only) - SDCC-compatible ABI: i8 in ACC, i16 in DPTR, unsigned char default - Targeting upstream Tier 3 contribution (tracking issue included) Changes: - compiler/rustc_target/src/spec/targets/mcs51_unknown_none_elf.rs - compiler/rustc_target/src/spec/mod.rs (registration) - compiler/rustc_target/src/asm/mod.rs (Arch::Mcs51) - compiler/rustc_target/src/callconv/mod.rs - compiler/rustc_target/src/target_features.rs Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Summary
Adds
mcs51-unknown-none-elfas a Rust Tier 3 target for the MCS-51 (8051) processor family, targeting the Silicon Labs C8051F410. Intended for upstream submission per the Rust Target Tier Policy.Target spec
#[no_std]onlyFiles changed
compiler/rustc_target/src/spec/targets/mcs51_unknown_none_elf.rs— target speccompiler/rustc_target/src/spec/targets/mod.rs— registrationCompanion work
egym-playground/llvm-projectfeat/mcs51-backendmcs51-rt,mcs51-halin the LLVM dev branchTier 3 criteria
#[no_std]only — no host toolchain dependency