[MCS51] Add mcs51-unknown-none-elf Tier 3 target

compiler/rustc_target/src/asm/mod.rs

@@ -273,7 +273,7 @@ impl InlineAsmArch {
             Arch::Msp430 => Some(Self::Msp430),
             Arch::M68k => Some(Self::M68k),
             Arch::CSky => Some(Self::CSKY),
-            Arch::AmdGpu | Arch::Xtensa | Arch::Other(_) => None,
+            Arch::AmdGpu | Arch::Mcs51 | Arch::Xtensa | Arch::Other(_) => None,
         }
     }
 }

compiler/rustc_target/src/callconv/mod.rs

@@ -708,7 +708,7 @@ impl<'a, Ty> FnAbi<'a, Ty> {
             Arch::RiscV32 | Arch::RiscV64 => riscv::compute_abi_info(cx, self),
             Arch::Wasm32 | Arch::Wasm64 => wasm::compute_abi_info(cx, self),
             Arch::Bpf => bpf::compute_abi_info(cx, self),
-            arch @ (Arch::SpirV | Arch::Other(_)) => {
+            arch @ (Arch::Mcs51 | Arch::SpirV | Arch::Other(_)) => {
                 panic!("no lowering implemented for {arch}")
             }
         }

compiler/rustc_target/src/spec/abi_map.rs

@@ -57,6 +57,7 @@ impl AbiMap {
             }),
             Arch::Avr => ArchKind::Avr,
             Arch::LoongArch32 | Arch::LoongArch64 => ArchKind::LoongArch,
+            Arch::Mcs51 => ArchKind::Other,
             Arch::Msp430 => ArchKind::Msp430,
             Arch::Nvptx64 => ArchKind::Nvptx,
             Arch::RiscV32 | Arch::RiscV64 => ArchKind::Riscv,

compiler/rustc_target/src/spec/mod.rs

@@ -1463,6 +1463,7 @@ supported_targets! {
     ("loongarch64-unknown-linux-musl", loongarch64_unknown_linux_musl),
     ("m68k-unknown-linux-gnu", m68k_unknown_linux_gnu),
     ("m68k-unknown-none-elf", m68k_unknown_none_elf),
+    ("mcs51-unknown-none-elf", mcs51_unknown_none_elf),
     ("csky-unknown-linux-gnuabiv2", csky_unknown_linux_gnuabiv2),
     ("csky-unknown-linux-gnuabiv2hf", csky_unknown_linux_gnuabiv2hf),
     ("mips-unknown-linux-gnu", mips_unknown_linux_gnu),
@@ -1904,6 +1905,7 @@ crate::target_spec_enum! {
         LoongArch32 = "loongarch32",
         LoongArch64 = "loongarch64",
         M68k = "m68k",
+        Mcs51 = "mcs51",
         Mips = "mips",
         Mips32r6 = "mips32r6",
         Mips64 = "mips64",
@@ -1941,6 +1943,7 @@ impl Arch {
             Self::LoongArch32 => sym::loongarch32,
             Self::LoongArch64 => sym::loongarch64,
             Self::M68k => sym::m68k,
+            Self::Mcs51 => rustc_span::Symbol::intern("mcs51"),
             Self::Mips => sym::mips,
             Self::Mips32r6 => sym::mips32r6,
             Self::Mips64 => sym::mips64,
@@ -1971,7 +1974,7 @@ impl Arch {
         match self {
             AArch64 | RiscV32 | RiscV64 => true,
             AmdGpu | Arm | Arm64EC | Avr | Bpf | CSky | Hexagon | LoongArch32 | LoongArch64
-            | M68k | Mips | Mips32r6 | Mips64 | Mips64r6 | Msp430 | Nvptx64 | PowerPC
+            | M68k | Mcs51 | Mips | Mips32r6 | Mips64 | Mips64r6 | Msp430 | Nvptx64 | PowerPC
             | PowerPC64 | S390x | Sparc | Sparc64 | SpirV | Wasm32 | Wasm64 | X86 | X86_64
             | Xtensa | Other(_) => false,
         }
@@ -2248,7 +2251,7 @@ impl Target {
             // - Check that calling c-variadic functions defined in Rust can be called from C.
             // For most targets `tests/run-make/c-link-to-rust-va-list-fn` can be used here.
             // For no_std targets a manual setup may be needed.
-            Sparc | Avr | M68k | Msp430 => {
+            Sparc | Avr | M68k | Mcs51 | Msp430 => {
                 CVariadicStatus::Unstable { feature: sym::c_variadic_experimental_arch }
             }
 
@@ -3839,6 +3842,7 @@ impl Target {
             }
             Arch::Sparc64 => (Architecture::Sparc64, None),
             Arch::Avr => (Architecture::Avr, None),
+            Arch::Mcs51 => return None,
             Arch::Msp430 => (Architecture::Msp430, None),
             Arch::Hexagon => (Architecture::Hexagon, None),
             Arch::Xtensa => (Architecture::Xtensa, None),

compiler/rustc_target/src/spec/targets/mcs51_unknown_none_elf.rs

@@ -0,0 +1,43 @@
+//! Target spec for MCS-51 (8051) bare-metal.
+//!
+//! Targets the `mcs51-unknown-none-elf` triple, matching the LLVM backend
+//! developed at <https://github.com/elizabethshirley/llvm-project/tree/feat/mcs51-backend>.
+//!
+//! # Tier 3 target
+//! This target is Tier 3 per the [Rust target policy].
+//! It is maintained on a best-effort basis.
+//!
+//! [Rust target policy]: https://doc.rust-lang.org/rustc/target-tier-policy.html
+
+use crate::spec::{
+    Arch, Cc, LinkerFlavor, PanicStrategy, RelocModel, Target, TargetMetadata, TargetOptions,
+};
+
+pub(crate) fn target() -> Target {
+    Target {
+        llvm_target: "mcs51-unknown-none-elf".into(),
+        metadata: TargetMetadata {
+            description: Some("MCS-51 (8051) bare-metal".into()),
+            tier: Some(3),
+            host_tools: Some(false),
+            std: Some(false),
+        },
+        pointer_width: 16,
+        data_layout: "e-m:e-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8:16-a:8".into(),
+        arch: Arch::Mcs51,
+
+        options: TargetOptions {
+            c_int_width: 16,
+            exe_suffix: ".elf".into(),
+            linker: Some("sdcc".into()),
+            linker_flavor: LinkerFlavor::Unix(Cc::Yes),
+            max_atomic_width: Some(0),
+            atomic_cas: false,
+            panic_strategy: PanicStrategy::Abort,
+            relocation_model: RelocModel::Static,
+            emit_debug_gdb_scripts: false,
+            eh_frame_header: false,
+            ..Default::default()
+        },
+    }
+}

compiler/rustc_target/src/target_features.rs

@@ -1032,7 +1032,7 @@ impl Target {
             Arch::Sparc | Arch::Sparc64 => SPARC_FEATURES,
             Arch::M68k => M68K_FEATURES,
             Arch::Avr => AVR_FEATURES,
-            Arch::AmdGpu | Arch::Msp430 | Arch::SpirV | Arch::Xtensa | Arch::Other(_) => &[],
+            Arch::AmdGpu | Arch::Mcs51 | Arch::Msp430 | Arch::SpirV | Arch::Xtensa | Arch::Other(_) => &[],
         }
     }
 
@@ -1054,7 +1054,7 @@ impl Target {
                 MIPS_FEATURES_FOR_CORRECT_FIXED_LENGTH_VECTOR_ABI
             }
             Arch::AmdGpu => AMDGPU_FEATURES_FOR_CORRECT_FIXED_LENGTH_VECTOR_ABI,
-            Arch::Nvptx64 | Arch::Bpf | Arch::M68k | Arch::Avr => &[], // no vector ABI
+            Arch::Nvptx64 | Arch::Bpf | Arch::M68k | Arch::Avr | Arch::Mcs51 => &[], // no vector ABI
             Arch::CSky => CSKY_FEATURES_FOR_CORRECT_FIXED_LENGTH_VECTOR_ABI,
             // FIXME: for some tier3 targets, we are overly cautious and always give warnings
             // when passing args in vector registers.

compiler/rustc_target/src/tests.rs

@@ -1,5 +1,5 @@
 use crate::json::ToJson;
-use crate::spec::Target;
+use crate::spec::{Arch, Target, TargetTuple};
 
 #[test]
 fn report_unused_fields() {
@@ -40,3 +40,12 @@ fn custom_arch_propagates_from_json() {
         assert_eq!(serialized["arch"], "customarch");
     });
 }
+
+#[test]
+fn builtin_mcs51_target_is_registered() {
+    let target = Target::expect_builtin(&TargetTuple::from_tuple("mcs51-unknown-none-elf"));
+
+    assert_eq!(target.arch, Arch::Mcs51);
+    assert_eq!(target.llvm_target, "mcs51-unknown-none-elf");
+    assert_eq!(target.pointer_width, 16);
+}

rust-toolchain.toml

@@ -0,0 +1,7 @@
+# Pinned nightly toolchain for the mcs51-unknown-none-elf Tier 3 target work.
+#
+# Building rustc_target requires nightly features. Use:
+#   RUSTC_BOOTSTRAP=1 CFG_RELEASE="1.97.0-nightly" cargo +nightly build -p rustc_target
+#   RUSTC_BOOTSTRAP=1 CFG_RELEASE="1.97.0-nightly" cargo +nightly test  -p rustc_target
+[toolchain]
+channel = "nightly-2026-05-10"