Fix LPUART1 ISR priority override causing FreeRTOS assert in boost mode#7
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Fix LPUART1 ISR priority override causing FreeRTOS assert in boost mode#7
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…, adc_monitor, pd_interface modules) Co-authored-by: electricalhog <15219301+electricalhog@users.noreply.github.com>
… constant, HRTIM reconfigure) Co-authored-by: electricalhog <15219301+electricalhog@users.noreply.github.com>
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[WIP] Implement NLSpec based on generated code and project spec
NLSpec Implementation: Buck-Boost Regulator Firmware
Mar 11, 2026
Co-authored-by: electricalhog <15219301+electricalhog@users.noreply.github.com>
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NLSpec Implementation: Buck-Boost Regulator Firmware
Bootstrap reset, TIM7 IRQ fix, HRTIM bit corrections, default test task
Mar 13, 2026
| #define PIN_OUTPUT_DIS_PIN GPIO_PIN_9 | ||
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| /* ========================================================================= | ||
| * SECTION 6: HRTIM TIMING CONSTANTS |
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Timer constants should be compiled from time-based calculations instead of assuming a period count
| * Called from HAL_ADC_ConvCpltCallback. Reads adc1_dma_buffer and updates | ||
| * adc_measurements.v_out_mv, i_inductor_ma, i_out_ma, i_in_ma. | ||
| * | ||
| * May also be called directly from the PID ISR for a synchronous read. |
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nice feature for grabbing vales off the buffer
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| /** | ||
| * PidConfig — tuning coefficients and execution parameters. | ||
| * | ||
| * These values are runtime-mutable (§8.7): they may be written from the | ||
| * debug interface without stopping the regulator. The PID ISR reads them | ||
| * on every execution cycle. | ||
| */ | ||
| typedef struct | ||
| { | ||
| float kp; /**< Proportional gain. Default 1.0 (§8.7). */ | ||
| float ki; /**< Integral gain. Default 100.0 (§8.7). */ | ||
| float kd; /**< Derivative gain. Default 0.0 (§8.7). */ | ||
| float dt_seconds; /**< Execution period in seconds. Default 50 µs. */ | ||
| float output_min; /**< Minimum clamped output (PID_OUTPUT_MIN). */ | ||
| float output_max; /**< Maximum clamped output (PID_OUTPUT_MAX). */ | ||
| } PidConfig; |
| * 1. Reconfigure HRTIM output fault levels to INACTIVE (all FETs off on | ||
| * fault). CubeMX sets FaultLevel = NONE; this corrects it (§5.5). | ||
| * 2. Enable FLT1 and FLT2 fault response on Timer A and Timer B. | ||
| * 3. Configure backstop Compare 1 registers on Timer A and Timer B (§10.3). |
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update compare for blanking and backstop
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| typedef enum | ||
| { | ||
| SLOPE_COMP_MODE_BUCK = 0, /**< Buck: downslope = V_out / L */ | ||
| SLOPE_COMP_MODE_BOOST = 1 /**< Boost: downslope = (V_out − V_in) / L */ | ||
| } SlopeCompMode; |
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could reference the other mode type
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| if (regulator_mode == REGULATOR_MODE_BUCK) | ||
| { | ||
| hrtim_apply_buck_mode_static_leg(); | ||
| } | ||
| else | ||
| { | ||
| hrtim_apply_boost_mode_static_leg(); | ||
| } |
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needs future-proofing for buck-boost
| HAL_HRTIM_WaveformOutputStart(&hhrtim1, | ||
| HRTIM_OUTPUT_TB1 | HRTIM_OUTPUT_TB2); | ||
| } | ||
| else /* BOOST */ |
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not always boost, may be 4-switch later
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I'd like to implement external event blanking using compare 1, so increasing index of backstop and bootstrap is necessary.
…log ring buffer Co-authored-by: electricalhog <15219301+electricalhog@users.noreply.github.com>
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Bootstrap reset, TIM7 IRQ fix, HRTIM bit corrections, default test task
HRTIM CMP reassignment (blanking/backstop/bootstrap), debug_log ring buffer, fix CMake sources
Mar 14, 2026
…LPUART1/DMA 3/0→5 Co-authored-by: electricalhog <15219301+electricalhog@users.noreply.github.com>
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HRTIM CMP reassignment (blanking/backstop/bootstrap), debug_log ring buffer, fix CMake sources
Fix FreeRTOS ISR priority violations causing configASSERT at port.c:754
Mar 14, 2026
… immediate VIN_RANGE fault Co-authored-by: electricalhog <15219301+electricalhog@users.noreply.github.com>
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Fix FreeRTOS ISR priority violations causing configASSERT at port.c:754
Fix wrong BOOST mode selection on first regulator_start() due to stale v_in_mv=0
Mar 15, 2026
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Fix wrong BOOST mode selection on first regulator_start() due to stale v_in_mv=0
Fix LPUART1 ISR priority override causing FreeRTOS assert in boost mode
Mar 15, 2026
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HW_TRACER_EMB_StartRX()hardcodes LPUART1 NVIC priority to 3, silently overriding the compliant priority-5 set inHW_TRACER_EMB_Init(). When LPUART1 RXNE fires (e.g. STM32CubeMonitor response during active USB-PD trace traffic),GUI_CALLBACK_RX()callsosMessageQueuePut()from priority-3 context — belowconfigLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY = 5— triggeringvPortValidateInterruptPriorityassert →taskDISABLE_INTERRUPTS()+for(;;). In boost mode this manifests as a hung default task with HRTIM still switching (priority 1 unaffected by BASEPRI=0x50); in buck mode there is no inbound LPUART traffic so the assert never fires and the system runs normally.Changes
tracer_emb_hw.c—HW_TRACER_EMB_StartRX(): replace hardcoded priority3withTRACER_EMB_TX_IRQ_PRIORITY(defined as5intracer_emb_conf.h), consistent with the priority already set inHW_TRACER_EMB_Init().TRACER_EMB_TX_IRQ_PRIORITY = 5sits exactly at the FreeRTOS syscall ceiling, soosMessageQueuePut()inGUI_CALLBACK_RX()is now called from a compliant ISR priority in both modes.✨ Let Copilot coding agent set things up for you — coding agent works faster and does higher quality work when set up for your repo.