[PW_SID:1078443] riscv: Generate riscv instruction functions#1747

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linux-riscv-bot wants to merge 16 commits into

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Commits on Apr 10, 2026

riscv: Introduce instruction table generation

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: alternatives: Use generated instruction headers for patching code

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: kgdb: Use generated instruction headers

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: kprobes: Use generated instruction headers

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: cfi: Use generated instruction headers

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: Use generated instruction headers for misaligned loads/stores

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: kvm: Use generated instruction headers for csr code

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: kvm: Fix MMIO emulation for sign-extended insns

thecharlesjenkins
authored and
Linux RISC-V bot
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KVM: device: Add test device

thecharlesjenkins
authored and
Linux RISC-V bot
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KVM: riscv: selftests: Add mmio test

thecharlesjenkins
authored and
Linux RISC-V bot
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riscv: kvm: Use generated instruction headers for mmio emulation

thecharlesjenkins
authored and
Linux RISC-V bot
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riscv: kvm: Add emulated test csr

thecharlesjenkins
authored and
Linux RISC-V bot
committed
KVM: riscv: selftests: Add csr emulation test

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: kvm: Use generated instruction headers for csr emulation

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: kexec: Use generated instruction headers for kexec relocations

thecharlesjenkins
authored and
Linux RISC-V bot
committed
riscv: Remove unused instruction headers

thecharlesjenkins
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Linux RISC-V bot
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[PW_SID:1078443] riscv: Generate riscv instruction functions#1747

[PW_SID:1078443] riscv: Generate riscv instruction functions#1747
linux-riscv-bot wants to merge 16 commits into
workflowriscvfixesfrom
pw1078443

Commits on Apr 10, 2026

riscv: Introduce instruction table generation

riscv: alternatives: Use generated instruction headers for patching code

riscv: kgdb: Use generated instruction headers

riscv: kprobes: Use generated instruction headers

riscv: cfi: Use generated instruction headers

riscv: Use generated instruction headers for misaligned loads/stores

riscv: kvm: Use generated instruction headers for csr code

riscv: kvm: Fix MMIO emulation for sign-extended insns

KVM: device: Add test device

KVM: riscv: selftests: Add mmio test

riscv: kvm: Use generated instruction headers for mmio emulation

riscv: kvm: Add emulated test csr

KVM: riscv: selftests: Add csr emulation test

riscv: kvm: Use generated instruction headers for csr emulation

riscv: kexec: Use generated instruction headers for kexec relocations

riscv: Remove unused instruction headers