[PW_SID:1102295] [v1] riscv: cpufeature: Add Zic64b ISA extension support#2027
[PW_SID:1102295] [v1] riscv: cpufeature: Add Zic64b ISA extension support#2027linux-riscv-bot wants to merge 1 commit into
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Zic64b describes a platform with 64-byte cache block sizes. It is a mandatory part of RVA23U64, but a system may provide 64-byte CMO block sizes without satisfying all profile requirements. The ISA string parser currently ignores Zic64b because the extension is not present in the cpufeature table. Add an ISA extension ID and table entry for Zic64b so it can be reported in /proc/cpuinfo when firmware advertises it. Validate the entry against the CBO block sizes discovered from firmware. Only check CBO block sizes that are present, since Zic64b constrains implemented CBO extensions to use 64-byte blocks but does not require all CBO extensions to exist. Signed-off-by: Qingwei Hu <qingwei.hu@bytedance.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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Patch 1: "[v1] riscv: cpufeature: Add Zic64b ISA extension support" |
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PR for series 1102295 applied to workflow__riscv__fixes
Name: [v1] riscv: cpufeature: Add Zic64b ISA extension support
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1102295
Version: 1