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[PW_SID:1102295] [v1] riscv: cpufeature: Add Zic64b ISA extension support #2027

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[PW_SID:1102295] [v1] riscv: cpufeature: Add Zic64b ISA extension support #2027

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1 change: 1 addition & 0 deletions arch/riscv/include/asm/hwcap.h
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Original file line number Diff line number Diff line change
Expand Up @@ -112,6 +112,7 @@
#define RISCV_ISA_EXT_ZCLSD 103
#define RISCV_ISA_EXT_ZICFILP 104
#define RISCV_ISA_EXT_ZICFISS 105
#define RISCV_ISA_EXT_ZIC64B 106

#define RISCV_ISA_EXT_XLINUXENVCFG 127

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14 changes: 14 additions & 0 deletions arch/riscv/kernel/cpufeature.c
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Original file line number Diff line number Diff line change
Expand Up @@ -136,6 +136,19 @@ static int riscv_ext_zicbop_validate(const struct riscv_isa_ext_data *data,
return 0;
}

static int riscv_ext_zic64b_validate(const struct riscv_isa_ext_data *data,
const unsigned long *isa_bitmap)
{
if ((riscv_cbom_block_size && riscv_cbom_block_size != 64) ||
(riscv_cbop_block_size && riscv_cbop_block_size != 64) ||
(riscv_cboz_block_size && riscv_cboz_block_size != 64)) {
pr_err("Zic64b detected in ISA string, disabling as a present CBO block size is not 64 bytes\n");
return -EINVAL;
}

return 0;
}

static int riscv_ext_f_validate(const struct riscv_isa_ext_data *data,
const unsigned long *isa_bitmap)
{
Expand Down Expand Up @@ -499,6 +512,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
__RISCV_ISA_EXT_SUPERSET(c, RISCV_ISA_EXT_c, riscv_c_exts),
__RISCV_ISA_EXT_SUPERSET_VALIDATE(v, RISCV_ISA_EXT_v, riscv_v_exts, riscv_ext_vector_float_validate),
__RISCV_ISA_EXT_DATA(h, RISCV_ISA_EXT_h),
__RISCV_ISA_EXT_DATA_VALIDATE(zic64b, RISCV_ISA_EXT_ZIC64B, riscv_ext_zic64b_validate),
__RISCV_ISA_EXT_SUPERSET_VALIDATE(zicbom, RISCV_ISA_EXT_ZICBOM, riscv_xlinuxenvcfg_exts, riscv_ext_zicbom_validate),
__RISCV_ISA_EXT_DATA_VALIDATE(zicbop, RISCV_ISA_EXT_ZICBOP, riscv_ext_zicbop_validate),
__RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts, riscv_ext_zicboz_validate),
Expand Down